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Observer
Observer
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Registered: ‎04-14-2016

JESD204 receives always 0xb5 (D21.5)

I'm using ZC706 evaluation board and I've instantiated an IP 'JESD204 + PHY' RX while in another board: VCU108 I've instantiated JESD204+PHY TX. The two boards are connected via FMC HPC.

Soon after loading Zynq FPGA, I see by ILA correctly JESD204 sync pattern from VCU108: (K28.5) '0xbcbcbcbc' but soon after I run SW by SDK debugger the data change to (D21.5) '0xb5b5b5b5' (or sometimes negated pattern '0x4a4a4a4a'). This value it's there also if I power off the VCU108.

Have an idea what happens?

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