08-28-2017 03:33 PM
what is high-level (P4) FPGA programming?
By google search, I found this:
Does it mean it is different from VHDL/Verilog? If so, is there any good book/material available for this?
Does one need different tools/compiler to work with P4? If so, what is it?
where this is used? Are all fpga/tools from Xilinx support this language?
08-28-2017 05:49 PM
It's important to make the distinction between high-level programming for FPGAs and P4 programming for FPGAs.
High-level programming (aka high level synthesis, HLS) is just using a higher-level language than HDL (VHDL or Verilog) to produce logic for the FPGA. The advantage of this is that high-level languages are easier for humans to write, so development time is reduced; the disadvantage is that HLS does not allow the level of fine-grained control and customization that HDL would. Most HLS tools actually produce HDL code which can then be handled by the regular synthesis tools. Xilinx has their own HLS tool, Vivado HLS, which takes C/C++/SystemC and produces Verilog and VHDL suitable for all of the "current" FPGAs (7 series and upwards). Vivado HLS is included for free with Vivado, although for larger chips you need a paid Vivado license.
P4 is a high-level language specifically for packet processing (ie networking applications). Netcope (the company you've linked to) offers a tool for doing P4-to-VHDL conversion. You will need to buy that tool (to do P4 to VHDL) and if you're aiming for a large FPGA you will also need to buy Vivado (to do VHDL to FPGA).
08-28-2017 11:06 PM
11-24-2017 08:51 PM
As a representative of Netcope, let me correct the statement about buying the specific tools. We actually provide cloud service where you upload P4 code and it does the whole process of P4 -> HDL -> bitstream. It is a paid service but not only you don't need to buy separate licenses for Vivado or P4-to-VHDL, you also don't need to deal with installing them or maintaining them. Same applies to the hardware you would need to get to run the compilation.