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Explorer
Explorer
240 Views
Registered: ‎12-08-2007

PicoBlaze6 cannot implement in Vivado

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I have a very simple example using PicoBlaze6. The test bench and simulation runs well.

But when I try to create the bit file, I get the following Implementaion  error concerning the VHDL component that was generated by the PicoBlaze6 assembler: 

[DRC INBB-3] Black Box Instances: Cell 'program_rom/ram_1k_generate.s6.kcpsm6_rom' of type 'RAMB16BWER' has undefined contents and is considered a black box. The contents of this cell must be defined for opt_design to complete successfully.

I attach the VHDL code that was generated by the assmbler.

Here is the port map of this component:

 

program_rom: My_test_forPico6 Port map (
address => address,
instruction => instruction,
enable => bram_enable,
rdl => open, 
clk => clk100);

 

 

What is wrong?

 

 

 

 

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1 Solution

Accepted Solutions
Explorer
Explorer
186 Views
Registered: ‎12-08-2007

Re: PicoBlaze6 cannot implement in Vivado

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I solved the problem

 

One needs to map the value of the generic parameter

C_FAMILY => "7S"

 

when you do port map of the component that contains the machine code of your assembly code.

This makes it fit the Artix family.

 

 

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3 Replies
Xilinx Employee
Xilinx Employee
230 Views
Registered: ‎05-22-2018

Re: PicoBlaze6 cannot implement in Vivado

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Hi @dag1 ,

Check for any missing packge or files,  you can check directly  the missing packages or files by looking at the red lines in source files window.

Thanks,

Raj

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Explorer
Explorer
199 Views
Registered: ‎12-08-2007

Re: PicoBlaze6 cannot implement in Vivado

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I am looking in the .VHd but there is no red lines: this file was generated by the Assembler of PicoBlaze6.

The error of implementation is:

[DRC INBB-3] Black Box Instances: Cell 'program_rom/ram_1k_generate.s6.kcpsm6_rom' of type 'RAMB16BWER' has undefined contents and is considered a black box. The contents of this cell must be defined for opt_design to complete successfully.

 

Here is the part in the .VHD which I think is relevant to the error message:

 

kcpsm6_rom: RAMB16BWER
      generic map ( DATA_WIDTH_A => 18,
                    DOA_REG => 0,
                    EN_RSTRAM_A => FALSE,
                    INIT_A => X"000000000",
                    RST_PRIORITY_A => "CE",
                    SRVAL_A => X"000000000",
                    WRITE_MODE_A => "WRITE_FIRST",
                    DATA_WIDTH_B => 18,
                    DOB_REG => 0,
                    EN_RSTRAM_B => FALSE,
                    INIT_B => X"000000000",
                    RST_PRIORITY_B => "CE",
                    SRVAL_B => X"000000000",
                    WRITE_MODE_B => "WRITE_FIRST",
                    RSTTYPE => "SYNC",
                    INIT_FILE => "NONE",
                    SIM_COLLISION_CHECK => "ALL",
                    SIM_DEVICE => "SPARTAN6",
                    INIT_00 => X"00000000000000000000000000000000000000000000200175FF0050D50115AA",
                    INIT_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_05 => X"000000005000605B92010084500060569101005A008250006051900100550080",
                    INIT_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_08 => X"0000000000000000000000000000000000000000500012025000110250001002",
                    INIT_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_0F => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_10 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_11 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_12 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_13 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_14 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_15 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
                    INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000",
                   INITP_00 => X"00000000000000000B6B6ADA0000000000000000000000000000000000000228",
                   INITP_01 => X"0000000000000000000000000000000000000000000000000000000000000888",
                   INITP_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
                   INITP_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
                   INITP_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
                   INITP_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
                   INITP_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
                   INITP_07 => X"0000000000000000000000000000000000000000000000000000000000000000")
      port map(  ADDRA => address_a(13 downto 0),
                   ENA => enable,
                  CLKA => clk,
                   DOA => data_out_a(31 downto 0),
                  DOPA => data_out_a(35 downto 32), 
                   DIA => data_in_a(31 downto 0),
                  DIPA => data_in_a(35 downto 32), 
                   WEA => "0000",
                REGCEA => '0',
                  RSTA => '0',
                 ADDRB => address_b(13 downto 0),
                   ENB => enable_b,
                  CLKB => clk_b,
                   DOB => data_out_b(31 downto 0),
                  DOPB => data_out_b(35 downto 32), 
                   DIB => data_in_b(31 downto 0),
                  DIPB => data_in_b(35 downto 32), 
                   WEB => we_b(3 downto 0),
                REGCEB => '0',
                  RSTB => '0');
    --               
    end generate s6;

 

 

This file uses the vcomponents, it has the followingl line:

 

library unisim;
use unisim.vcomponents.all;

 

 

I look in the data/vhdl folder of the Vivado and I see several packages:

 

retarget_VCOMP.VHD
unisim_retarget_VCOMP.VHD
unisim_VCOMP.VHD
unisim_VPKG.VHD

 

 

Only the file

unisim_retarget_VCOMP.VHD

contains the part: RAMB16BWER which is in use in my code.

Do I need to tell Vivado to use this specific file  for the package unisim.vcomponents.all?   How do I do that?

 

 

 

 

 

 

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Explorer
Explorer
187 Views
Registered: ‎12-08-2007

Re: PicoBlaze6 cannot implement in Vivado

Jump to solution

I solved the problem

 

One needs to map the value of the generic parameter

C_FAMILY => "7S"

 

when you do port map of the component that contains the machine code of your assembly code.

This makes it fit the Artix family.

 

 

0 Kudos