PlanAhead 14.6 Critical Constraints Error

[connorlynch2487]

I'm in the process of creating an RPM from my EDIF netlist and came across an error with my constraints file, which is attached.

When I attempt PaR and examine the design in PlanAhead, the Pblocks are correctly placed the the RPM has been properly generated, but I get the error below:

CRITICAL WARNING: [Constraints 18-432] Could not process RLOC_ORIGIN X80Y275 for cell slave_core_bus_a/u_slave_core_rrfc_busa. Could not find an instance with RLOC_X0Y0 for u_slave_core_rrfc_busa 

My goal is to extract the RLOC (x,y) locations with reference to the point X80Y275 so that I can use them to generate a .ncf file.

Thank you in advance to anyone that can assist with this issue. The only other reference I found to this particular Constraints warning was for a different error. 

[siktap]

Is the RLOC origin honored? Please find a good example of the usage.

Example3: Combination of DSP + Flip-Flops + LUTs placed with absolute path
INST "Maddsub_mult_val_mult00003" U_SET=dsp_ff_logic__rpm |RLOC =X73Y15 | RPM_GRID = GRID | RLOC_ORIGIN=X0Y0; ### DSP module
INST "out_val_4" U_SET=dsp_ff_logic__rpm | RLOC =X69Y12; ### FF_1
INST "out_val_5" U_SET=dsp_ff_logic__rpm | RLOC =X79Y16; ### FF_2
INST "out_val_2_cmp_eq00001" U_SET=dsp_ff_logic__rpm | RLOC =X69Y12; ### LUT_1
INST "out_val_3_cmp_eq00001" U_SET=dsp_ff_logic__rpm | RLOC =X79Y16; ### LUT_2

When the user wants to place different types of primitives together, then it is mandatory to use the absolute path placement. Use the RPM_GRID = GRID and RLOC_ORIGIN constraints and specify the correct place for each primitive type. LUTs and Flip-Flops are combined in the same SLICES.

Hope this helps.

Regards

Sikta

[vemulad]

Hi,

RLOC_ORIGIN alone will not do anything. You need to specify RLOC constraints too.

RLOC_ORIGIN sets up the reference starting coordinates for all members of a RPM group, if the primitives have to be placed in a specific location of the FPGA.

In other words, this value is added to the RLOC value to determine the exact location of the elements of the RPM. Finall_location = RLOC_ORIGIN + RLOC.

Thanks,

Deepika.

[primoz_beltram]

I hit same problem with constraints generated by MIG CoreGen tools. See this link on forum (RLOC_ORIGIN critical warning) and reply I got.

[siktap]

If the RLOC origins are honored, then it could be a false warning. But Please check that before you proceed on the analysis.

Regards

Sikta