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adam123
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Why would I use a LUT5_L instead of an RLOC?

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UG615 says: "the functionality of the LUT5, LUT5_L, and LUT5_D is the same ... the LUT5_L specifies that the only connections from the LUT5 is within a slice or CLB".

 

I'm having a bit of a hard time figuring out the use case for LUT5_L.  It seems to have the same placement effect as an RLOC_RANGE constraining the LUT and all loads driven by it to be within the same CLB.  Is that all that LUT5_L is?  A more convenient way of writing this particular kind of RLOC_RANGE?

 

Clearly the LUT5/LUT5_L distinction affects the placer.  Does it affect the router as well?  In other words, does it actually prevent the router from using paths that go outside the CLB?  I suppose that would be one thing you can do with LUT5_L that you can't do with RLOC_RANGE, but I'm not sure I've interpreted it correctly.

 

 

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bwade
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The LUT5_L is a packing constraint that tells the pack/place tools to pack the LUT and its loads in the same slice. This is not a hard constraint but is treated like a hint to the packer.  It's usually used by synthesis tool to guide the intended packing behavior. The RLOC constraint's main value is to constrain multiple instances spanning multiple components (slice or otherwise) by defining relative offsets to various instances. While it can be used to constrain multiple instances to a single slice, that is a small subset of it capability. There are other constraints that can be used to do the same (BLKNM, LOC). The RLOC constraint is a hard constraint meaning that you will get a pack error if it can't be obeyed. I don't understand the references to RLOC_RANGE which is a separate constraint used to range constrain the macro that results from RLOC constraints. None of these pack/place constraints effect the router behavior other than their obvious effect on packing and placement.

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bwade
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The LUT5_L is a packing constraint that tells the pack/place tools to pack the LUT and its loads in the same slice. This is not a hard constraint but is treated like a hint to the packer.  It's usually used by synthesis tool to guide the intended packing behavior. The RLOC constraint's main value is to constrain multiple instances spanning multiple components (slice or otherwise) by defining relative offsets to various instances. While it can be used to constrain multiple instances to a single slice, that is a small subset of it capability. There are other constraints that can be used to do the same (BLKNM, LOC). The RLOC constraint is a hard constraint meaning that you will get a pack error if it can't be obeyed. I don't understand the references to RLOC_RANGE which is a separate constraint used to range constrain the macro that results from RLOC constraints. None of these pack/place constraints effect the router behavior other than their obvious effect on packing and placement.

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adam123
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Thanks bwade!

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adam123
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@bwade wrote:

I don't understand the references to RLOC_RANGE which is a separate constraint used to range constrain the macro that results from RLOC constraints.


Right; with a LOC (or RLOC plus RLOC_ORIGIN) you have to specify a slice.  What I was getting at was the fact that a CLB is two slices on Spartan-6 so if you want to leave the placer free to pick either of those two slices -- rather than force one of them in particular -- you'd need an RLOC plus an RLOC_RANGE spanning the two slices instead of a RLOC+RLOC_ORIGIN.

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bwade
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I suggest using area groups with range constraints for any sort of area constraining. Those are more mainstream constraints that probably receive more testing. You also have the option of closing the area group to outside logic.

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