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Adventurer
Adventurer
968 Views
Registered: ‎11-06-2017

how to accelerate synthesis/implement/bit in vivado?

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Hello Everyone! 

I wonder if there is a way to avoid all re-implementation that Vivado takes for any updates of the design! For example, I just add a signal to one of the HLS implemented modules, and unfortunately, Vivado re-implemented all the design. I wonder if there are caches or options that user can tell to Vivado to just re-implement the parts regarding the newly added signal! Sine, it is really tedious whenever you want to add or apply a small modification in a huge design consist of several HLS/VHDL modules. I know we can use floorplanning to have fixed implementation for parts of the design, but this is also time-consuming. I wonder if such an auto-option to tell Vivado to be aware of new signals and just re-implemented parts regarding this new signal. 

thank you, 
Farnam

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Moderator
Moderator
963 Views
Registered: ‎01-16-2013

Re: how to accelerate synthesis/implement/bit in vivado?

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@fkhalili

 

An easy way would be to use Incremental compile option in Vivado:

https://www.xilinx.com/support/answers/57853.html

 

--Syed

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Moderator
Moderator
964 Views
Registered: ‎01-16-2013

Re: how to accelerate synthesis/implement/bit in vivado?

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@fkhalili

 

An easy way would be to use Incremental compile option in Vivado:

https://www.xilinx.com/support/answers/57853.html

 

--Syed

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Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

Did you check our new quick reference timing closure guide (UG1292)?
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View solution in original post

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Voyager
Voyager
962 Views
Registered: ‎08-16-2018

Re: how to accelerate synthesis/implement/bit in vivado?

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We all want that. Implementing HDL is not compiling software. A compiler task is relatively straightforward, Software guys tweak something and compile and run, don't stop to analyze whether is right or not, it's faster that way. This is different. We build less and think more (or at least pretend...).

One way you might get an improvement is by having a hierarchy of block diagrams. I think those who are not modified are cached. I haven't tried it (too busy dragging things on the floor to give wheels a try, you know) but I have the feeling it might speed things up a fraction.

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Adventurer
Adventurer
917 Views
Registered: ‎11-06-2017

Re: how to accelerate synthesis/implement/bit in vivado?

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@johnvivm@syedz

Hi Guys! 

Thank you so much for your replies. Yes, even though if one was a good Vivado player you might have committed some careless mistakes pushing you forward to re-synthesis the design. 

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