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iafo1
Visitor
Visitor
3,338 Views
Registered: ‎02-05-2010

-retiming option for just some intances...

Hi!

I'd like to enable the -retiming option of global optimization for just some instances in my project. Is it possible? How can I do it?

The problem is that retiming cause an error with DDR logic (see http://forums.xilinx.com/t5/Implementation/Fatal-error-during-mapping-of-ddr2-logic/td-p/103798 ) and I can't solve it. So I'd like to apply retiming only on my peripheral, I have to do it to improve the time-performances. Thank you!

 

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luisb
Xilinx Employee
Xilinx Employee
3,308 Views
Registered: ‎04-06-2010

You can do this in your RTL or UCF:

 

For VHDL:

signal your_ddr_sig : std_logic;

 

 

attribute register_balancing: string;
attribute register_balancing of {signal_name | entity_name}: your_ddr_sig is "no";

 

 

For Verilog:

(* register_balancing = "no" *)

reg your_ddr_sig

 

In the UCF:

inst "your_ddr_register_instance_name" register_balancing "no";

 

Hope this helps...

 

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