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Adventurer
Adventurer
601 Views
Registered: ‎06-14-2018

Petalinux 2019.1 DPU interrupt timeout

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Hi all,

I'm using Petalinux 2019.1 with custom board. The vivado design use DPU IP 2.0, Low RAM usage, DNNC 1.4.0. And I'm facing with interrupt timeout issue.

I searched on the forum, and it looks like every interrupt timeout posts point to wrong dnnc version. I have double checked, I use Low RAM Usage & dnnc 1.4.0 --> this is correct.

Vivado design as attached.

dpu.dtsi

&amba{
	dpu{
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "xilinx,dpu";
		base-addr = <0x8F000000>;     //CHANGE THIS ACCORDING TO YOUR DESIGN
		core-num = <0x1>;
		reg = <0x0 0x8f000000 0x0 0x700>;
		clock-names = "s_axi_aclk", "dpu_2x_clk", "m_axi_dpu_aclk";
		clocks = <&zynqmp_clk 71>, <&misc_clk_1>, <&misc_clk_2>;

		dpucore {
			compatible = "xilinx,dpucore";
			interrupt-parent = <&gic>;
			interrupts = <0x0 107 0x4 >; //CHANGE THIS ACCORDING TO YOUR DESIGN
			core-num = <0x1>; //CHANGE THIS ACCORDING TO YOUR DESIGN
		};
/*
		softmax {
			compatible = "xilinx,smfc";
			interrupt-parent = <&gic>;
			interrupts = <0x0 108 0x4>;
			core-num = <0x1>;
		};
	};
*/
};

dnnc version on host PC

$ ls -l /usr/local/bin/dnnc*
lrwxrwxrwx 1 root root       13 Aug 14 10:24 /usr/local/bin/dnnc -> dnnc-dpu1.4.0
-rwxr-xr-x 1 root root 28192608 Aug 14 10:24 /usr/local/bin/dnnc-dpu1.4.0
-rwxr-xr-x 1 root root 28192608 Aug 14 10:24 /usr/local/bin/dnnc-dpu1.4.0.1

But I always got interrupt timeout error even I change the dpu timeout value to 60 seconds.
Some information on the board:

# dexplorer -v
DNNDK version  3.0
Copyright @ 2018-2019 Xilinx Inc. All Rights Reserved.

DExplorer version 1.5
Build Label: Apr 25 2019 09:50:06

DSight version 1.4
Build Label: Apr 25 2019 09:50:06

N2Cube Core library version 2.3
Build Label: Apr 25 2019 09:50:20

DPU Driver version 2.2.0
Build Label: Aug 13 2019 11:22:21
# dexplorer -s
[DPU cache]
Enabled

[DPU mode]
normal

[DPU timeout limitation (in seconds)]
60

[DPU Debug Info]
Debug level     : 9
Core 0 schedule : 2
Core 0 interrupt: 0

[DPU Resource]
DPU Core        : 0
State           : Idle
PID             : 3343
TaskID          : 2
Start           : 520601393300
End             : 0

[DPU Registers]
VER             : 0x09298cfb
RST             : 0x000000ff
ISR             : 0x00000000
IMR             : 0x00000000
IRSR            : 0x00000000
ICR             : 0x00000000

DPU Core        : 0
HP_CTL          : 0x07070f0f
ADDR_IO         : 0x00000000
ADDR_WEIGHT     : 0x00000000
ADDR_CODE       : 0x00070200
ADDR_PROF       : 0x00000000
PROF_VALUE      : 0x00000000
PROF_NUM        : 0x00000000
PROF_EN         : 0x00000000
START           : 0x00000000
COM_ADDR_L0     : 0x70400000
COM_ADDR_H0     : 0x00000000
COM_ADDR_L1     : 0x73f00000
COM_ADDR_H1     : 0x00000000
COM_ADDR_L2     : 0x70200000
COM_ADDR_H2     : 0x00000000
COM_ADDR_L3     : 0x00000000
COM_ADDR_H3     : 0x00000000
COM_ADDR_L4     : 0x00000000
COM_ADDR_H4     : 0x00000000
COM_ADDR_L5     : 0x00000000
COM_ADDR_H5     : 0x00000000
COM_ADDR_L6     : 0x00000000
COM_ADDR_H6     : 0x00000000
COM_ADDR_L7     : 0x00000000
COM_ADDR_H7     : 0x00000000

[Memory Resource]
MemInUse        :        0 MB

When running yolov3 example:

# ./yolo coco_test.jpg i &
[1] 3381
# dexplorer -s
[DPU cache]
Enabled

[DPU mode]
normal

[DPU timeout limitation (in seconds)]
60

[DPU Debug Info]
Debug level     : 9
Core 0 schedule : 3
Core 0 interrupt: 0

[DPU Resource]
DPU Core        : 0
State           : Running
PID             : 3381
TaskID          : 3
Start           : 10486823094692
End             : 0

[DPU Registers]
VER             : 0x09298cfb
RST             : 0x000000ff
ISR             : 0x00000000
IMR             : 0x00000000
IRSR            : 0x00000000
ICR             : 0x00000000

DPU Core        : 0
HP_CTL          : 0x07070f0f
ADDR_IO         : 0x00000000
ADDR_WEIGHT     : 0x00000000
ADDR_CODE       : 0x00070200
ADDR_PROF       : 0x00000000
PROF_VALUE      : 0x00000000
PROF_NUM        : 0x00000000
PROF_EN         : 0x00000000
START           : 0x00000001
COM_ADDR_L0     : 0x70400000
COM_ADDR_H0     : 0x00000000
COM_ADDR_L1     : 0x73f00000
COM_ADDR_H1     : 0x00000000
COM_ADDR_L2     : 0x70200000
COM_ADDR_H2     : 0x00000000
COM_ADDR_L3     : 0x00000000
COM_ADDR_H3     : 0x00000000
COM_ADDR_L4     : 0x00000000
COM_ADDR_H4     : 0x00000000
COM_ADDR_L5     : 0x00000000
COM_ADDR_H5     : 0x00000000
COM_ADDR_L6     : 0x00000000
COM_ADDR_H6     : 0x00000000
COM_ADDR_L7     : 0x00000000
COM_ADDR_H7     : 0x00000000

[Memory Resource]
MemInUse        :       78 MB

# [10511.339958] [DPU][3381][PID 3381][taskID 3]Core 0 Run timeout,failed to get finish interrupt!
[10511.348500] [DPU][3381][DPU debug info]
[10511.348500] level = 9
[10511.354599] [DPU][3381]Core 0 schedule  counter: 3
[10511.359403] [DPU][3381]Core 0 interrupt counter: 0
[10511.364200] [DPU][3381][DPU Registers]
[10511.367943] [DPU][3381]VER           : 0x09298cfb
[10511.372378] [DPU][3381]RST           : 0x000000ff
[10511.376814] [DPU][3381]ISR           : 0x00000000
[10511.381250] [DPU][3381]IMR           : 0x00000000
[10511.385685] [DPU][3381]IRSR          : 0x00000000
[10511.390122] [DPU][3381]ICR           : 0x00000000
[10511.394556] [DPU][3381]
[10511.396987] [DPU][3381]DPU Core      : 0
[10511.400460] [DPU][3381]HP_CTL        : 0x07070f0f
[10511.404723] [DPU][3381]ADDR_IO       : 0x00000000
[10511.408985] [DPU][3381]ADDR_WEIGHT   : 0x00000000
[10511.413508] [DPU][3381]ADDR_CODE     : 0x00070200
[10511.417857] [DPU][3381]ADDR_PROF     : 0x00000000
[10511.422206] [DPU][3381]PROF_VALUE    : 0x00000000
[10511.426642] [DPU][3381]PROF_NUM      : 0x00000000
[10511.430904] [DPU][3381]PROF_EN       : 0x00000000
[10511.435166] [DPU][3381]START         : 0x00000001
[10511.439429] [DPU][3381]COM_ADDR_L0   : 0x70400000
[10511.443952] [DPU][3381]COM_ADDR_H0   : 0x00000000
[10511.448474] [DPU][3381]COM_ADDR_L1   : 0x73f00000
[10511.452997] [DPU][3381]COM_ADDR_H1   : 0x00000000
[10511.457520] [DPU][3381]COM_ADDR_L2   : 0x70200000
[10511.462043] [DPU][3381]COM_ADDR_H2   : 0x00000000
[10511.466565] [DPU][3381]COM_ADDR_L3   : 0x00000000
[10511.471088] [DPU][3381]COM_ADDR_H3   : 0x00000000
[10511.475611] [DPU][3381]COM_ADDR_L4   : 0x00000000
[10511.480134] [DPU][3381]COM_ADDR_H4   : 0x00000000
[10511.484656] [DPU][3381]COM_ADDR_L5   : 0x00000000
[10511.489179] [DPU][3381]COM_ADDR_H5   : 0x00000000
[10511.493702] [DPU][3381]COM_ADDR_L6   : 0x00000000
[10511.498224] [DPU][3381]COM_ADDR_H6   : 0x00000000
[10511.502747] [DPU][3381]COM_ADDR_L7   : 0x00000000
[10511.507270] [DPU][3381]COM_ADDR_H7   : 0x00000000
[10511.511792] [DPU][3381]
[DNNDK] DPU timeout while execute DPU Task:yolo-3

[1]+  Done(255)               ./yolo coco_test.jpg i


Do you have any ideas about this problem?

Another point is, the DPU kernel module from Xilinx tutorial has DPU target is 1.3.0 (https://github.com/Xilinx/Edge-AI-Platform-Tutorials/blob/master/docs/DPU-Integration/reference-files/files/recipes-modules/dpu/dpu.bb#L20) But DPU IP 2.0 has DPU target 1.4.0. Can I find the kernel module for DPU 1.4.0 somewhere?
Thank you all for your time.

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Xilinx Employee
Xilinx Employee
412 Views
Registered: ‎01-21-2014

Re: Petalinux 2019.1 DPU interrupt timeout

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UG348 states that the interrupt is active high.  In the DPU Integration tutorial, I use a value of 4 for the interrupt type: 

https://github.com/Xilinx/Edge-AI-Platform-Tutorials/blob/master/docs/DPU-Integration/reference-files/files/dpu.dtsi

Regards, 

Terry

 

 

16 Replies
Xilinx Employee
Xilinx Employee
570 Views
Registered: ‎01-21-2014

Re: Petalinux 2019.1 DPU interrupt timeout

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The latest version of the tutorial uses DPU v2.0 and the associated driver. It's also available with the DPU TRD. You also need to check your device tree, it's not correct. Please compare to the device tree in the updated tutorial or the TRD.

 

Terry

 

 

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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@terryo Thank for your response.
Do you mean the tutorial device tree is this file: https://github.com/Xilinx/Edge-AI-Platform-Tutorials/blob/master/docs/DPU-Integration/reference-files/files/dpu.dtsi?

I did use this file for reference, then updating interrupt number & number of core.

Can you please point out which part in my device tree is wrong? Thank you so much.

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Hi @terryo ,

I have tried with following device-tree, but still no interrupt occurs. I saw the interrupt handler is correctly registered.

dpu.dtsi

&amba{
        dpu{
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "xilinx,dpu";
                base-addr = <0x8f000000>;     //CHANGE THIS ACCORDING TO YOUR DESIGN
                interrupt-parent = <&gic>;
                interrupts = <0x0 107 0x4 >; //CHANGE THIS ACCORDING TO YOUR DESIGN
    };
};

interrupt list

# cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3
  3:       4012       4029      31070       4897     GICv2  30 Level     arch_timer
  6:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
  7:          0          0          0          0     GICv2 175 Level     arm-pmu
  8:          0          0          0          0     GICv2 176 Level     arm-pmu
  9:          0          0          0          0     GICv2 177 Level     arm-pmu
 10:          0          0          0          0     GICv2 178 Level     arm-pmu
 11:          0          0          0          0     GICv2 156 Level     zynqmp-dma
 12:          0          0          0          0     GICv2 157 Level     zynqmp-dma
 13:          0          0          0          0     GICv2 158 Level     zynqmp-dma
 14:          0          0          0          0     GICv2 159 Level     zynqmp-dma
 15:          0          0          0          0     GICv2 160 Level     zynqmp-dma
 16:          0          0          0          0     GICv2 161 Level     zynqmp-dma
 17:          0          0          0          0     GICv2 162 Level     zynqmp-dma
 18:          0          0          0          0     GICv2 163 Level     zynqmp-dma
 20:          0          0          0          0     GICv2 109 Level     zynqmp-dma
 21:          0          0          0          0     GICv2 110 Level     zynqmp-dma
 22:          0          0          0          0     GICv2 111 Level     zynqmp-dma
 23:          0          0          0          0     GICv2 112 Level     zynqmp-dma
 24:          0          0          0          0     GICv2 113 Level     zynqmp-dma
 25:          0          0          0          0     GICv2 114 Level     zynqmp-dma
 26:          0          0          0          0     GICv2 115 Level     zynqmp-dma
 27:          0          0          0          0     GICv2 116 Level     zynqmp-dma
 29:        339          0          0          0     GICv2  95 Level     eth0, eth0
 30:          0          0          0          0     GICv2  42 Level     ff960000.memory-controller
 31:          0          0          0          0     GICv2  57 Level     axi-pmon, axi-pmon
 32:          0          0          0          0     GICv2 155 Level     axi-pmon, axi-pmon
 33:         18          0          0          0     GICv2  47 Level     ff0f0000.spi
 34:          0          0          0          0     GICv2  58 Level     ffa60000.rtc
 35:          0          0          0          0     GICv2  59 Level     ffa60000.rtc
 36:       4442          0          0          0     GICv2  80 Level     mmc0
 37:        276          0          0          0     GICv2  81 Level     mmc1
 38:        498          0          0          0     GICv2  53 Level     xuartps
 40:          0          0          0          0     GICv2  84 Edge      ff150000.watchdog
 41:          0          0          0          0     GICv2  88 Level     ams-irq
 42:         74          0          0          0     GICv2  61 Level     zynqmp_ipi1
 43:        600          0          0          0     GICv2 121 Edge      a0020000.axi_quad_spi
 44:          0          0          0          0     GICv2 139 Level     dpu_isr
 45:         21          0          0          0     GICv2 138 Level     eth1
 46:          0          0          0          0     GICv2 137 Level     eth1
 48:        319          0          0          0     GICv2  62 Level     zynqmp_ipi2
 49:          0          0          0          0     GICv2 136 Level     vdma0_irq
IPI0:      1466       2237       2402       2866       Rescheduling interrupts
IPI1:       159        446        228        344       Function call interrupts
IPI2:         0          0          0          0       CPU stop interrupts
IPI3:         0          0          0          0       CPU stop (for crash dump) interrupts
IPI4:       998       1255        174       1050       Timer broadcast interrupts
IPI5:         0          0          0          0       IRQ work interrupts
IPI6:         0          0          0          0       CPU wake-up interrupts
Err:          0
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Xilinx Employee
Xilinx Employee
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Registered: ‎01-21-2014

Re: Petalinux 2019.1 DPU interrupt timeout

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From what I see, neither of your device trees match the format found in the tutorial or TRD.  I'm not sure if this is the problem, but I'd get that cleaned up first. 

Terry

 

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Here is the TRD device tree

/ {
        amba{
                dpu@8f000000 {
                        compatible = "deephi, dpu";
                        interrupt-parent = <&gic>;
                        interrupts = <0x0 0x6a 0x1 0x0 0x6b 0x1>;
                        reg = <0x0 0x8f000000 0x0 0x700>;
                        memory = <0x60000000 0x80000000>;
                        core-num = <0x2>;
                };
	};
};

I already applied this one to my board:

/ {
        amba{
                dpu@8f000000 {
                        compatible = "deephi, dpu";
                        interrupt-parent = <&gic>;
                        interrupts = <0x0 107 0x1>;
                        reg = <0x0 0x8f000000 0x0 0x700>;
                        memory = <0x60000000 0x80000000>;
                        core-num = <0x1>;
                };
	};
};

But the interrupt type "0x01" causes interrupt type mismatch error when dpu.ko module probed. I change the interrupt type to 0x4, the mismatch error goes away, but still no interrupts occurs (DPU interrupt timedout).

Now, I'm trying to bring up minimal design on ZCU102 board & try.

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-21-2014

Re: Petalinux 2019.1 DPU interrupt timeout

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That's the .dts snippet for the old TRD for DPU v1.0(1.3.0) and old driver.  It seems you might have a mismatch somewhere between TRD, DPU IP, driver, dts, etc.   You should be using the files from the lastest TRD on xilinx.com, or the files from the DPU integration tutorial.  

 

It might be better for you to wait for the 2019.1 DPU TRD to be release and move forward from there. 

 

Terry

 

 

 

 

Terry

 

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Hi @terryo ,

I downloaded from here: https://www.xilinx.com/products/intellectual-property/dpu.html , so I think that is the latest file.

Do you known when TRD 2019.1 will be released?

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-21-2014

Re: Petalinux 2019.1 DPU interrupt timeout

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That looks like a link to the old TRD, I will report that to the proper person. You should download TRDs from here: 

https://www.xilinx.com/products/design-tools/ai-inference/ai-developer-hub.html#edge

 

It looks like the 2019.1 TRD was just added. 

 

Terry

 

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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@terryo Thank you. Can you please double check the download link? I got this problem when download the file.

Selection_006.png
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Xilinx Employee
Xilinx Employee
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Registered: ‎05-24-2019

Re: Petalinux 2019.1 DPU interrupt timeout

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Hi @quentonh  and @terryo ,

I saw the DPU 2019.1 TRD link, but when I download it, above error occurs and I can't download the TRD file.

Here are the link that I can't download, can you please double check?

https://www.xilinx.com/member/forms/download/design-license-xef.html?filename=zcu102-dpu-trd-2019-1-190809.zip

https://www.xilinx.com/member/forms/download/dnndk-eula-xef.html?filename=xilinx_dnndk_v3.1_190809.tar.gz

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Xilinx Employee
Xilinx Employee
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Registered: ‎05-24-2019

Re: Petalinux 2019.1 DPU interrupt timeout

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@nvl1109@terryoYes, I see now that you are asking about the TRD file link.  You are correct, and I believe that none of the file links are yet accessible.  I seem to recall that this is not is not unusual on the day when files are added to Xilinx.com.  I would recommend that you check back in several hours, or worst case tomorrow.

--Quenton

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Hi @quentonh ,

You are right. Now I can access the file. I'm building the new one. I will update the result later. Thank you.

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Adventurer
Adventurer
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Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Hi @terryo @quentonh ,

One question, why dpu.dtsi always use "rising edge" interrupt type (0x1 in interrupt declaration of dpu.dtsi) while vivado design use "ACTIVE_HIGH" interrupt type? This causes "interrupt mismatch" error when inserting dpu.ko module.

So which one is correct?

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Xilinx Employee
Xilinx Employee
413 Views
Registered: ‎01-21-2014

Re: Petalinux 2019.1 DPU interrupt timeout

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UG348 states that the interrupt is active high.  In the DPU Integration tutorial, I use a value of 4 for the interrupt type: 

https://github.com/Xilinx/Edge-AI-Platform-Tutorials/blob/master/docs/DPU-Integration/reference-files/files/dpu.dtsi

Regards, 

Terry

 

 

Adventurer
Adventurer
395 Views
Registered: ‎06-14-2018

Re: Petalinux 2019.1 DPU interrupt timeout

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Hi @terryo  @quentonh  and all,

I can confirm that the TRD 2019.1 works fine.

The TRD 2018.2 doesn't work for us on Vivado/Petalinux 2019.1, after upgraded to TRD2019.1, it does work now.

Thank you for your kindly support.

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