07-24-2018 10:13 PM
I have DDR4 Memory IP example design running on my board. How do I run ATG.
Can I use Vivado to run the ATG.
Browsing the forums, I see the VIO has to be instantiated along with the example design.
How is the vio run?
07-25-2018 02:31 PM
Hello @hithesh123,
You need to make sure and customize the DDR IP to use the Advanced Traffic Generator on the Advanced Options Tab. Then build the IP Example Design. That will turn on the ATG for you by default.
Thanks,
Cory
07-25-2018 09:36 AM
Hello @hithesh123,
The ATG can operate without he instantiation of the VIO. We have a bram lookup table in our Example Design to run through some patterns. You can modify the look-up table to do whatever you like and then generate a new bitstream.
To turn on manual mode and use the VIO, you need to add a ‘define VIO_ATG_EN in example_top.sv.
This is all documented in PG150.
Thanks,
Cory
07-25-2018 11:23 AM
How do I enable the ATG in the example design. Is it enabled by default?
07-25-2018 02:31 PM
Hello @hithesh123,
You need to make sure and customize the DDR IP to use the Advanced Traffic Generator on the Advanced Options Tab. Then build the IP Example Design. That will turn on the ATG for you by default.
Thanks,
Cory