03-28-2018 01:07 AM
I'm working with Vivado 2017.2, DDR4 SDRAM MIG v2.2 in Controller and physical layer mode, with AXI4 Interface. This is implemented on a KU115 platform.
Currently I'm having problem reading back what have been written. Regardless, when I look at the MIG_1 calibration status through the Debug port (Chipscope), I noticed the following properties on the top left:
MIG Status: CAL_PASS
Microblaze Status: PASS
DQS Gate Status: FAIL: underflow of the coarse taps used for tracking. Error found on Rank 0, Byte 6.
Message: No error detected during calibration.
Below this is a list of tests which are either PASS or SKIP, no failure.
Just wonder if anyone knows what the failure on DQS Gate Status mean. What kind of symptoms would it cause and if anyone has an idea how to fix it?
03-28-2018 10:42 AM
Can you refresh the MIG core and see if the message is still there? Also, how many DDR4 interfaces are in the design?
Use this command:
refresh_hw_mig [lindex [get_hw_migs] x]
x is 0 if you only have 1 core
Are you able to run traffic on the interface without any errors?