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Visitor ssh24
Visitor
413 Views
Registered: ‎02-26-2019

FREQ_HZ and CLK_DOMIAN crossing

Hello,

I am using a Tri Mode Ethernet MAC along with a AXI direct memory access in my design.

When I have my design ready, the Synthesis fails due to the errors listed below:

  • [BD 41-237] Bus Interface property FREQ_HZ does not match between /tri_mode_ethernet_mac_0/s_axis_tx(125000000) and /axi_dma_0/M_AXIS_MM2S(100000000)
  • [BD 41-237] Bus Interface property CLK_DOMAIN does not match between /tri_mode_ethernet_mac_0/s_axis_tx(/clk_wiz_clk_out1) and /axi_dma_0/M_AXIS_MM2S(design_1_processing_system7_0_0_FCLK_CLK0

The properties are locked and read only, the result is not reflected after changing the xml and xci constraints. Also Clock converters and AXI Interconnects are not effective 

Awaiting your suggestions

Thank you

 

 

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4 Replies
Teacher xilinxacct
Teacher
401 Views
Registered: ‎10-23-2018

Re: [BD 41-237] Bus Interface property FREQ_HZ does not match

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Visitor ssh24
Visitor
383 Views
Registered: ‎02-26-2019

Re: [BD 41-237] Bus Interface property FREQ_HZ does not match

Hi @xilinxacct,
Thank you 
I could somehow solve the Frequency mismatch error by changing the Processing system frequency but the Clock domain mismatch persists. I am using two different clock domains in my design which are unsynchroized. 

Please find the errors below:

[BD 41-237] Bus Interface property CLK_DOMAIN does not match between /axi_smc/S01_AXI(design_1_processing_system7_0_0_FCLK_CLK0) and /axi_dma_0/M_AXI_S2MM(/tri_mode_ethernet_mac_0/rx_mac_aclk)
[BD 41-237] Bus Interface property CLK_DOMAIN does not match between /tri_mode_ethernet_mac_0/s_axis_tx(/clk_wiz_clk_out1) and /axi_dma_0/M_AXIS_MM2S(design_1_processing_system7_0_0_FCLK_CLK0)


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Teacher xilinxacct
Teacher
374 Views
Registered: ‎10-23-2018

Re: [BD 41-237] Bus Interface property FREQ_HZ does not match

@ssh24 

I'm glad the other was resolved.... Maybe this will apply to the second issue...

https://forums.xilinx.com/t5/Synthesis/Vivado-2014-2-Synthesis-Error-Bus-Interface-property-CLK-DOMAIN/m-p/552233#M13041

Hope that helps.

If so, please mark as solution accepted. Kudos also welcomed. :-)

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Visitor ssh24
Visitor
368 Views
Registered: ‎02-26-2019

Re: [BD 41-237] Bus Interface property FREQ_HZ does not match

Hi @xilinxacct,
I believe the solution appiles only for a Vivado customized IP. 

Please let me know if you find any other solution.

Thank you

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