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derickshi
Adventurer
Adventurer
5,528 Views
Registered: ‎11-25-2015

How to initialize DDR3 with data

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Hi guys,

 

Not sure if this is right section to post it.

 

I'm working on a project which involves very large amount of data, so I have to go off-chip.

 

I designed the algorithm module with HLS tool so the basic idea is connect my HLS module with the MIG core to let the HLS module read data from the DDR3 chip.

 

I'm now trying to figure out how to send the data from my PC to the off-chip DDR3 before the computation begins. I'm planning to use the UART core to communicate with the PC. However, the UART core has only an AXI slave interface, the MIG also has only an AXI slave interface, what should I do to make these parts work?

 

The board is VC707 developing kit.

 

Thank a lot,

 

Derick

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derickshi
Adventurer
Adventurer
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Registered: ‎11-25-2015

Well this tutorial helps:

 

It teaches you how to build a simple Microblaze project to access UART and DDR.

 

microblaze_tutorial

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balkris
Xilinx Employee
Xilinx Employee
5,488 Views
Registered: ‎08-01-2008
check these links
https://www.xilinx.com/support/documentation/boards_and_kits/kcu105/2015_1/xtp348-kcu105-mig-es3-2015-1.pdf
https://forums.xilinx.com/t5/Simulation-and-Verification/Hello-world-UART-communication-with-MIG/td-p/698730
https://forums.xilinx.com/t5/Welcome-Join/Zynq-UART-16550-FIFO-size/td-p/674561
https://www.xilinx.com/support/documentation/application_notes/xapp1162.pdf
Thanks and Regards
Balkrishan
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athandr
Xilinx Employee
Xilinx Employee
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Registered: ‎07-31-2012
So i am not sure on your setup. Can you elaborate how are the PC, VC707, DDR3, UART connected?

If you are using a Processor, you can use the AXI-4 DMA to connect to the DDR3.
Thanks,
Anirudh

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derickshi
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Registered: ‎11-25-2015

@athandr I want to communicate with the PC using the axi uartlite core, and the board is connected with the pc by an standard-A to mini-B USB cable. 

 

The DDR3 is accessed through  an MIG core.

 

My question is: the MIG core has an AXI4 slave interface, the UART core also has an AXI4 slave interface, my HLS module has an AXI4 master interface, how do I do with them to make them work together?(that is , transmit the data from PC to FPGA, send the data to DDR3 throught MIG, then let my HLS module read the data from DDR3.)

 

Is Microblaze and DMA necessary to implement this? If yes, how?

 

I'm pretty new at this, so I'll be very appreciated if you can provide me some detailed explanations and suggestions.

 

Thanks,

 

Derick 

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derickshi
Adventurer
Adventurer
9,187 Views
Registered: ‎11-25-2015

Well this tutorial helps:

 

It teaches you how to build a simple Microblaze project to access UART and DDR.

 

microblaze_tutorial

View solution in original post

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sameertest
Observer
Observer
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Registered: ‎02-08-2018

Hi Derick

Did you find the solution?

I am looking for the fastest way to fill DDR completely using SDK

I have enormous amount of data that sould be filled in DDR quickly

Thanks

Sameer

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