12-12-2016 01:37 PM - edited 12-12-2016 02:39 PM
Not sure if this is right section to post it.
I'm working on a project which involves very large amount of data, so I have to go off-chip.
I designed the algorithm module with HLS tool so the basic idea is connect my HLS module with the MIG core to let the HLS module read data from the DDR3 chip.
I'm now trying to figure out how to send the data from my PC to the off-chip DDR3 before the computation begins. I'm planning to use the UART core to communicate with the PC. However, the UART core has only an AXI slave interface, the MIG also has only an AXI slave interface, what should I do to make these parts work?
The board is VC707 developing kit.
Thank a lot,
12-12-2016 08:14 PM
12-12-2016 11:21 PM
12-13-2016 10:30 AM
@athandr I want to communicate with the PC using the axi uartlite core, and the board is connected with the pc by an standard-A to mini-B USB cable.
The DDR3 is accessed through an MIG core.
My question is: the MIG core has an AXI4 slave interface, the UART core also has an AXI4 slave interface, my HLS module has an AXI4 master interface, how do I do with them to make them work together?(that is , transmit the data from PC to FPGA, send the data to DDR3 throught MIG, then let my HLS module read the data from DDR3.)
Is Microblaze and DMA necessary to implement this? If yes, how?
I'm pretty new at this, so I'll be very appreciated if you can provide me some detailed explanations and suggestions.
08-30-2019 08:09 AM
Did you find the solution?
I am looking for the fastest way to fill DDR completely using SDK
I have enormous amount of data that sould be filled in DDR quickly