cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
thunder_vn
Visitor
Visitor
353 Views
Registered: ‎02-25-2021

How to use ddr3 device on FPGA board, using my Memory Controller and Xilinx DDR3 SDRAM IP (MIG).

Jump to solution

Hi everybody,

I am trying to test on-board DDR3 chip, using my Memory Controller and Xilinx DDR3 SDRAM IP (MIG).

I have modified the Xilinx MIG IP to remove its MC and User Interface logic, then replaced them with my own MC. I am looking for related labs. Can you give me a few suggestions. Thank you very much.

0 Kudos
1 Solution

Accepted Solutions
rpr
Moderator
Moderator
309 Views
Registered: ‎11-09-2017

Hi @thunder_vn 

Are you looking 7series device or ultrascale device? there are no related labs on this, check the following items.

- Ensure that clocks and resets are clean and stable.
-Make sure MMCMs and PLLs locked.
-Memory initialization.
-Calibration.
-After calibration check, "ready signals" are asserted.

-Read/write transaction.

 

i would recommend you to validate your hardware with Xilinx example design (right-click on xci and select open example design). Once hardware validated i.e, calibration pass and no data errors then you can add your custom controller.

Regards
Pratap

Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful.

View solution in original post

2 Replies
rpr
Moderator
Moderator
310 Views
Registered: ‎11-09-2017

Hi @thunder_vn 

Are you looking 7series device or ultrascale device? there are no related labs on this, check the following items.

- Ensure that clocks and resets are clean and stable.
-Make sure MMCMs and PLLs locked.
-Memory initialization.
-Calibration.
-After calibration check, "ready signals" are asserted.

-Read/write transaction.

 

i would recommend you to validate your hardware with Xilinx example design (right-click on xci and select open example design). Once hardware validated i.e, calibration pass and no data errors then you can add your custom controller.

Regards
Pratap

Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful.

View solution in original post

thunder_vn
Visitor
Visitor
153 Views
Registered: ‎02-25-2021

I have followed your instructions and run the behavioral simulation successfully, but the calibration fails when running post-synthesis functional simulation. Details are described here:

https://forums.xilinx.com/t5/Memory-Interfaces-and-NoC/Post-synthesis-simulation-with-Xilinx-PHY-Calibration-fail/m-p/1224859 

Can you show me the reason?

Thank you very much!

0 Kudos