01-19-2019 08:13 AM
As I try to implement four channel DDR3 memory controller, x16bits in MIG, I can *not* complete pin assignment with any of the Spartan 7 device packages, without any other pins assigned at all yet. Seems like its running out of IOs in required banks.
Is this correct ? I thought I saw somewhere 7 series devices support up to 8 DDR3 channels. May be for higher end Virtex 7 devices ?
Can someone share, whats the max DDR3 channels for x16bits can be implemented in Spartan 7 devices ?
Thanks in advance.
01-19-2019 08:41 PM
The good news is I have an answer to your question. The bad news is the answer is "probably".
For fun, I threw together a S7 design in Vivado 17.4 (it's what I had opened at the time) and was able to get a design implemented, using a beta version of a single MIG to create all 4 interfaces. The device is the largest S7 offered (S100), in the largest package available (FGGA676).
There was only 1 timing error, but it's due to Vivado thinking the REFCLK (for IDELAYCTRL's) is only running at 100 MHz. No bitstream was made due to no license.
Some notes of interest:
01-20-2019 06:20 AM
Thanks Joe G, its very helpful. I may need to rethink my approach.