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bivin
Participant
Participant
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Registered: ‎07-05-2017

MIG 7Series temperature Interpretation

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Hi

How to interpret the values from device_temp output of MIG controller. Is there any conversion table available. Will this give the exact DDR3 temperature ?

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ryana
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Registered: ‎11-28-2016

Hello @bivin,

 

Take a look at DAAR#51687 for some more details about this:

https://www.xilinx.com/support/answers/51687.html

 

A complete answer to explain this behavior is a bit involved but a short summary is that high speed silicon devices need these types of mechanisms in order to compensate for the physical properties of the device that change when the temperature changes. It's a very common industry practice.

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miker
Xilinx Employee
Xilinx Employee
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Registered: ‎11-30-2007

I assume you are looking for the XADC temperature sensor transfer function which can be found the in the 7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480; v1.10).  It is Equation 1-2.

 

XADC_Temp_Sensor_Xfer_Func.png

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bivin
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Registered: ‎07-05-2017
Hi 

From UG586, it is mentioned that "The temperature monitor helps maintain DQS center alignment in the data valid window by compensating for temperature drift.". How FPGA die temperature is related DQS of DDR3 memory. How device_temp output pin of MIG ip can be used ?

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ryana
Moderator
Moderator
1,851 Views
Registered: ‎11-28-2016

Hello @bivin,

 

Take a look at DAAR#51687 for some more details about this:

https://www.xilinx.com/support/answers/51687.html

 

A complete answer to explain this behavior is a bit involved but a short summary is that high speed silicon devices need these types of mechanisms in order to compensate for the physical properties of the device that change when the temperature changes. It's a very common industry practice.

View solution in original post

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