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Visitor
Visitor
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Registered: ‎01-24-2018

Problem to "open IP example design with MIG"

Hello, there is a problem.
I created MIG using VIVADO 18.2. I ran Open IP Example Design.
However, Top module is not synthesized with MIG IP and is included in Non-module Files.
And the message of Critical Warning is as follows.

 

Vivado Commands

  > General Messages

      > [Filemgmt 20-742] The top module "example_top" specified for this project can not be vaildated. The currunt project is usin automotic hierarchy update mode. and henc a now suitable replacements top will be automarically selected. If this is not disired, please change the gierarchy update mode to one of the manual compile order modes first, and then set top to any desired value.

     > [Filemgmt 20-730] Could not find a top module in the fileset sources_1

> Analysis Results

   > sources_1

      > [filemgmt 20-2001] Source scanning failed(launch error) while processing fileset "sources_1" due_to unrecoverable syntax error or design hierarchy issues. Recovering last known analysis of the source files.

      > [filemgmt 20-2001] Source scanning failed(launch error) while processing fileset "sim_1" due_to unrecoverable syntax error or design hierarchy issues. Recovering last known analysis of the source files.

I would appreciate if you know the solution.

 

 

 

 

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Moderator
Moderator
591 Views
Registered: ‎02-11-2014

Hello @dh0414.lee,

Could you walk me through exactly how you are running into this issue? I am looking for detailed steps here. What specific OS are you using? Is your MIG IP in Global Mode or OOC Mode? Is it in a Block Diagram? If OOC, is the DCP generated already BEFORE clicking on Open IP Example Design?

Thanks,
Cory

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