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Scholar embedded
Scholar
12,676 Views
Registered: ‎06-09-2011

SDRAM controller core in ISE12.4

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Hi all, I am so surprised that I see I can no longer add a SDRAM controller core to my VHDL/EDK project in ISE12.4!. Why should Xilinx remove some cores in every software release? What shall I do? putting aside my board and restart time consuming process of new board manufacturing? Only because of Xilinx that uses to remove many cores in every ISE release? That's a shame. As I need this board for one of my projects I would appreciate any help on this issue? Is there a for adding SDRAM controller to VHDL/EDK project in ISE12.4? I should add that I can't revert to prior releases of ISE as they had many bugs and problems in EDK which I don't see them in ISE12.4 Thanks in advance, Hossein
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Instructor
Instructor
19,790 Views
Registered: ‎08-14-2007

Re: SDRAM controller core in ISE12.4

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If you are talking about single-data rate SDRAM, you don't see the option in the base system builder, but after you configure the system for DDR memory, you can still open the DDR device (MPMC) and then change it to SDRAM.

-- Gabor

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SDRAM.PNG
10 Replies
Instructor
Instructor
19,791 Views
Registered: ‎08-14-2007

Re: SDRAM controller core in ISE12.4

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If you are talking about single-data rate SDRAM, you don't see the option in the base system builder, but after you configure the system for DDR memory, you can still open the DDR device (MPMC) and then change it to SDRAM.

-- Gabor

View solution in original post

SDRAM.PNG
Xilinx Employee
Xilinx Employee
12,669 Views
Registered: ‎07-11-2011

Re: SDRAM controller core in ISE12.4

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Hi,

 

Which FPGA device your board is equipped with ?

If this is Spartan-6 please see if the below selection helps

 

DDR_SDRAM.png

 

 

Regards,

Vanitha.

 

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Xilinx Employee
Xilinx Employee
12,667 Views
Registered: ‎08-02-2007

Re: SDRAM controller core in ISE12.4

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Hi Hossein

 

If you are using the memory controllers with OPB/PLBv34 interface, yes from 12.x all the OPB/PLBv34 IP's have been removed. Refer http://www.xilinx.com/support/answers/34610.html. The change was across all the EDK IP's.

 

If you would want to integrate the memory controller with a processor environment, i would recommend you to use MPMC.

 

It would be good, if you can explain the memory controller that you were using earlier, with the device/Software release.

 

--Hem

 

 

 

 

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Scholar embedded
Scholar
12,641 Views
Registered: ‎06-09-2011

Re: SDRAM controller core in ISE12.4

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Hi,


Thank you all: Gabor, Vanitha and Hem. I looked into the MIG and found out that I can select SDRAM.

 

Regards,

Hossein

 

 

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Instructor
Instructor
12,629 Views
Registered: ‎08-14-2007

Re: SDRAM controller core in ISE12.4

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@embedded wrote:

Hi,


Thank you all: Gabor, Vanitha and Hem. I looked into the MIG and found out that I can select SDRAM.

 

Regards,

Hossein

 

 


Just to be clear in case anyone else looks for the answer to the same question here, single-data-rate SDRAM has never been a MIG option.  It's only available with the MPMC.  So the settings are not in "MIG" but in the memory interface tab of the MPMC.  And as far as I know the MPMC is only available with the Embedded edition of ISE.

-- Gabor
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Scholar embedded
Scholar
12,621 Views
Registered: ‎06-09-2011

Re: SDRAM controller core in ISE12.4

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Hi,

 

Yes, you're right. Thank you for your note. I made a mistake.

 

Hossein

 

 

 

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Visitor mohammad66
Visitor
12,598 Views
Registered: ‎12-07-2013

Re: SDRAM controller core in ISE12.4

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Hi everyone
In Ise 13.2 in xps software , in bsb and after selecting custom board with spartan6 and for plb bus type, in selecting peripheral stage, there is only mcb_ddr2 and not ddr . After adding mcb_ddr2 , According to above help, when I click mpmc controller to change memory interface, there is not any choices for SDRAM and just for ddrx's and LPDDR. Please tell me a solution.
Many thanks

Regards,
Mohammed
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Instructor
Instructor
12,542 Views
Registered: ‎08-14-2007

Re: SDRAM controller core in ISE12.4

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You're right.  Spartan 6 MPMC uses the built-in memory controller block (MCB) which does not support single-data-rate SDRAM.  If you need to use external memory for Spartan 6 you should use DDR2 or newer memory devices.

-- Gabor
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Visitor bill8n95
Visitor
1,427 Views
Registered: ‎09-11-2017

Re: SDRAM controller core in ISE12.4

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I know this thread is old, but I'm a little confused.

I'm trying to find i ready made solution to interface a Spartan 6 to SDR SDRAM, but I found nothing.

I've tried Xilinx ISE v14.7 of both Embedded and Design Suite edition, and their EDK applications.

The MIG IP core supports LPDDR/DDR/DDR2/DDR3 (for Spartan 6) and the EDK supports DDR2/DDR3 (for all Spartan 3/3A/3E/6 FPGAs).

I've also tried ISE v11.1 (no Spartan 6 support yet) and v11.5 , both ISE and EDK with the same results.

 

So, versions 11.5 (intial support for Spartan 6) and 14.7 (final release) do not support SDR SDRAM.

Should I try a in between version (like v12.4) ?

Also, if I try DDR in ISE MIG IP core, I cannot change it somehow to SDR later. The MPMC (that is mentioned above) is part of EDK, where Spartan 3/3A/3E/6 do not support DDR nor SDR, but only DDR2/DDR3.

 

So, what version of ISE, in what installation mode (Design Suite/Embedded), in what architecture (32/64bit), in what operating system (Windows/Linux) does the above-mentioned trick of selecting DDR and then changing it to SDR ? (Spartan 6, right ?)

 

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Newbie kim_tae_ill
Newbie
546 Views
Registered: ‎05-17-2018

Re: SDRAM controller core in ISE12.4

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