06-24-2021 05:37 AM
We have a design which enables both of the zynq 7000 PS UARTS, however, initially only the secondary of the two is available for connection. We would thus like to be capable of running the DDR memory test (https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/zynq_dram_test) using the secondary UART for interaction instead of the primary. Is this somehow configurable?
06-25-2021 10:52 AM - edited 06-25-2021 10:55 AM
You can change which UART to set from the BSP settings.
If you are using Vitis, then from your Platform project, double click on the platform.spr:
then click, on the "Board Support Package" under your application related domain:
Then Click on "Modify BSP Settings":
You will find the UART setting as shown below:
After applying the changes, don't forget to rebuild your platform project and your system project.
07-04-2021 10:09 PM
Hi @abouassi ,
Thank you very much for the prompt response and apologize for my late reply. For the time being we are at XSDK 2019.2, and render the application through the HSI commands:
set board nv3 set hwdsgn [openhw $board/system.hdf] hsi generate_app -hw $hwdsgn -os standalone -proc ps7_cortexa9_0 -app zynq_dram_test -compile -dir $board/memtest file rename -force $board/memtest/executable.elf $board/memtest.elf
and as a consequence I first need to familiarize myself with the GUI. I assume there is no way of changing it through the code?