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Adventurer
Adventurer
305 Views
Registered: ‎08-30-2018

Unable to allocate all 2GB of DDR4_PL in ZCU106

Dear all,

I have a block design targeting a ZCU106 board.

I have used the Zynq UltraScale+ MPSoC to realize the Processing System and XDMA Bridge to PCI Express to implement PCIe.

I put a DDR4 SDRAM in the block design which is the DDR4_PL and I would like to allocate 2GB of memory to it. But I see in the Address Editor tab, that the maximum allowed memory cannot go beyond 512MB in the best case. Please see the attached photo of Address Editor. As you see, this DDR4_PL is ONLY seen by PCIe.

Screenshot from 2019-01-21 17-36-46.png

 

Can anoyonehelp me to overcome this problem and extend the DDR4_PL memory size?

Thanks in advance for your support.

Bests,

Daryon

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1 Reply
Moderator
Moderator
249 Views
Registered: ‎11-28-2016

Re: Unable to allocate all 2GB of DDR4_PL in ZCU106

Hello @daryon,

If you look in the screenshot you provided the maximum addressable space that can be assigned in M_AXI_B is 4GB and currently you have 2GB assigned for HP0_DDR_LOW, 512MB for HP0_QSPI, and 512MB for the C0_DDR4_ADDRESS_BLOCK. Overally you're using too much of your memory map for other stuff for 2GB to be avaible for the DDR4_PL.