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Visitor ebti07
Visitor
336 Views
Registered: ‎10-15-2018

Xs on MMCM_adv do port

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Hey,

I am reconfiguring MMCME2_adv with DRP ports. I am able to reconfigure four registers (all ClkReg1). Procedure for reconfiguring is as follows:

  • Read the register
  • Write the registers with new parameters and keeping the reserved bits as received.

With the other five registers that I want to configure, four Clkreg2 and one Divreg, I am unable to read back register values exactly on reserved bits. Instead of values, Xs are received. Apart from reserved bits, I receive correct register values as expected.

Please advise why I am getting Xs in some registers and bit values on other registers. How to rectify this problem? Snapshot of simulation is attached.

Xs on reserved bit output.PNG
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1 Solution

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Xilinx Employee
Xilinx Employee
266 Views
Registered: ‎08-21-2007

Re: Xs on MMCM_adv do port

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That's ok. You can leave them there and just check the functionality of the MMCM DRP.

View solution in original post

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Visitor ebti07
Visitor
298 Views
Registered: ‎10-15-2018

Re: Xs on MMCM_adv do port

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Hey,

I am able to reconfigure MMCME2_adv in spite of Xs on reserved bits of some registers. However, i will surely want to know why some registers behave differently.

Thanks.

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Xilinx Employee
Xilinx Employee
267 Views
Registered: ‎08-21-2007

Re: Xs on MMCM_adv do port

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That's ok. You can leave them there and just check the functionality of the MMCM DRP.

View solution in original post

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