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Observer xiaoguo
Observer
666 Views
Registered: ‎05-07-2018

modify c0_ddr4_ui_clk of KCU1500 ddr4 sdram

I used ddr4 sdram module of KCU1500 in block design (just drag and drop KCU1500's DDR IP from the board tab to the block design ), and I needed to modify c0_ddr4_ui_clk.

1.PNG

But I found that there's no relative function in Customize IP interface. And I couldn't modify the PHY to controller clock frequency ratio.

2.PNG

Now, memory interface speed is 1200MHz, c0_ddr4_ui_clk is 300MHz. Is there any way to modify c0_ddr4_ui_clk to 150MHz ?

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5 Replies
Voyager
Voyager
642 Views
Registered: ‎02-01-2013

Re: modify c0_ddr4_ui_clk of KCU1500 ddr4 sdram

Patience... if you had held your cursor over that GUI selection a little longer, the following hint would have appeared:

2019-01-17_7-48-31.jpg

The clock controller IP has a fixed memory-clock-to-user-clock ratio of 4:1. Since the memory clock speed is 1200 MHz, the user clock speed must be 300 MHz. The only way to get a 150-MHz user clock speed is to change the memory clock speed to 600 MHz. (And you'll have to whip-up a MIG from scratch to do that.)

-Joe G.

 

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Observer xiaoguo
Observer
613 Views
Registered: ‎05-07-2018

Re: modify c0_ddr4_ui_clk of KCU1500 ddr4 sdram

thank you for your reply, it's really helpful to me. But when I tried to modify the memory clock speed, I found that there's one limitation for period of memory clock speed.

2019-01-17_7-48-31.jpg

period of memory clock speed should range between 833ps and 1600ps. So the minimum frequency is 625MHz.

It seems there's no way to reach my need....

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Moderator
Moderator
545 Views
Registered: ‎02-11-2014

Re: modify c0_ddr4_ui_clk of KCU1500 ddr4 sdram

Hello @xiaoguo,

The KCU1500 is an Acceleration board which means in VIvado, it is designed to be used with board presets. i.e. drag/drop "DDR4 SDRAM 0" to the IPI canvas. Doing this locks you into using the dedicated CCIO/ clock that is available for this DDR4 interface. It is also the only way to successfully pinout the board in Vivado to the dram itself. What is the reasoning for needing a 150MHz clock? This board doesn't have a dedicated 150MHz clock available to accommodate this request.

Thanks,
Cory

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Observer xiaoguo
Observer
413 Views
Registered: ‎05-07-2018

Re: modify c0_ddr4_ui_clk of KCU1500 ddr4 sdram

I've been working on an open-source project named dnnweaver v2

the building instructions provided told me to do that...

the instruction says "We will also use the DDR1 IP to create a clock for DnnWeaver. To do this, specify 150MHz as the frequency for c0_ddr4_ui_clk by double-clicking the IP and then specifying 150 MHz in the Advanced Clocking tab."

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Xilinx Employee
Xilinx Employee
383 Views
Registered: ‎08-21-2007

回复: modify c0_ddr4_ui_clk of KCU1500 ddr4 sdram

For DDR4, the only supported ratio is 4:1.

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