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Voyager
Voyager
223 Views
Registered: ‎06-26-2015

vc707 MIG AXI

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for some reason when i using MIG for vc707, it skip the AXI parameter section, any reason why it does that?

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Xilinx Employee
Xilinx Employee
105 Views
Registered: ‎03-04-2018

回复: vc707 MIG AXI

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Hello @s002wjhw ,

 

I think that MIG IP is declared from the IP Catalog in the Vivado.  In that case, the AXI Parameter is skipped as you pointed out.  There is no issue at all.

 

If you want to use the AXI4, please create Block Design in Vivado.  AXI Parameter is appeared in the MIG GUI, and it also possible to set some values.

 

 

Best regards,

Kshimizu

Product Application Engineer Xilinx Technical Support

-------------------------------------------------------

Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.  Please Give Kudos.

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vc707.PNG
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Xilinx Employee
Xilinx Employee
192 Views
Registered: ‎03-04-2018

Re: vc707 MIG AXI

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Hello @s002wjhw ,

 

I’m not sure your question, so could you please tell us more in details?

 

Do you refer to some documents such as XTP206?

https://www.xilinx.com/products/boards-and-kits/ek-v7-vc707-g.html#documentation

 

 

Best regards,

Kshimizu

Product Application Engineer Xilinx Technical Support

-------------------------------------------------------

Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.  Please Give Kudos.

-------------------------------------------------------

xtp206.PNG
Xilinx Employee
Xilinx Employee
175 Views
Registered: ‎08-21-2007

回复: vc707 MIG AXI

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If you want to creat MIG with AXI interface, you can creat a new Vivado project and choose the FPGA part instead of the demo board VC707.

Voyager
Voyager
141 Views
Registered: ‎06-26-2015

回复: vc707 MIG AXI

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what i mean is the GUI complete "skip" the AXI interface section for vc707 board when I hit "next" button under Controller options (tried only with xilinx part v7 485 1761, but had same result)     All other section i can edit Untitled.jpg

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Voyager
Voyager
133 Views
Registered: ‎06-26-2015

回复: vc707 MIG AXI

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so i try vivado 2017.2 and other device for the MIG, result is the same, it always skip the AXI interface options.  any ideas why?

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Xilinx Employee
Xilinx Employee
106 Views
Registered: ‎03-04-2018

回复: vc707 MIG AXI

Jump to solution

Hello @s002wjhw ,

 

I think that MIG IP is declared from the IP Catalog in the Vivado.  In that case, the AXI Parameter is skipped as you pointed out.  There is no issue at all.

 

If you want to use the AXI4, please create Block Design in Vivado.  AXI Parameter is appeared in the MIG GUI, and it also possible to set some values.

 

 

Best regards,

Kshimizu

Product Application Engineer Xilinx Technical Support

-------------------------------------------------------

Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.  Please Give Kudos.

-------------------------------------------------------

vc707.PNG