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DDR3 MIG PHY issue

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Explorer
Posts: 298
Registered: ‎03-31-2016
Accepted Solution

DDR3 MIG PHY issue

Hello

 

I want to used IP catalog to generator DDR3 MIG by vivado.

 

I want to used MIG PHY design to combine my DRAM controller.

 

The MIG PHY and DRAM controller is used DFI communication?

 

FPGA device: xc7v2000t

Software: vivado 2015.4

 


Accepted Solutions
Moderator
Posts: 5,544
Registered: ‎09-20-2012

Re: DDR3 MIG PHY issue

Hi @quincyq2003

 

No, it is not DFI compliant. Check this thread for related discussion https://forums.xilinx.com/t5/Memory-Interfaces/DFI-Interface-for-DDR3-in-7-Series-FPGAs/td-p/195842

Thanks,
Deepika.
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All Replies
Moderator
Posts: 5,544
Registered: ‎09-20-2012

Re: DDR3 MIG PHY issue

Hi @quincyq2003

 

No, it is not DFI compliant. Check this thread for related discussion https://forums.xilinx.com/t5/Memory-Interfaces/DFI-Interface-for-DDR3-in-7-Series-FPGAs/td-p/195842

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
Moderator
Posts: 5,303
Registered: ‎08-01-2008

Re: DDR3 MIG PHY issue

check these ARs
https://www.xilinx.com/support/answers/34926.html
https://www.xilinx.com/support/answers/34946.html
Thanks and Regards
Balkrishan
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Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
Explorer
Posts: 298
Registered: ‎03-31-2016

Re: DDR3 MIG PHY issue

Hello @vemulad @balkris

 

Thanks for your help!!!