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Voyager
Voyager
487 Views
Registered: ‎08-16-2018

HMC memory and Artix-7?

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Artix-7's DDR speeds are limited to 800 Mb/s (-2 speed) or 1066 (-3 speed) which is a bit contrasting for FPGAs with MGTs that can reach the Gbs. 

Looking for a higher bandwidth memory solution for Artix, I found Micron's HMC (Hybrid Memory Cube) that promise several Gb/s over a limited number of serial lanes. 

I did some research about the question I'm posting and it seems I need a Kintex at least to interface an HMC. 

So I'm just asking for a confirmation of my fears. If I were to use a Kintex then I would just pick up a faster DDR.

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Advisor evgenis1
Advisor
437 Views
Registered: ‎12-03-2007

Re: HMC memory and Artix-7?

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Hi @johnvivm , 

I've used HMC in a couple of projects targeting Ultrascale chips. Here are some words of caution:

- HMC datasheets only publish peak performance numbers, which only work for the best-case scenario of sequential reads or writes. If you have random-access read/write patterns, the performance drops by an order of magnitude.

- Power consumption might be higher than you expect because of the multi-gigabit serial interfaces.

- HMC roadmap is unclear. It looks like the industry gears towards HBM. I haven't seen any new HMC silicon, and major HMC FPGA IP core updates in the last 1-2 years.

 

Thanks,

Evgeni

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5 Replies
Moderator
Moderator
460 Views
Registered: ‎09-18-2014

Re: HMC memory and Artix-7?

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Johnvivm,

 

So what exactly is your question? The reason Artix speeds are limited due to their IO banks are entirely HR IO banks... cost optimized means also performance sacrifices. You need to leverage HP IOs to obtain higher rates. Xilinx does not support or have any IPs catering to HMC with 7-series however there are other IP vendors out there that will. See Open Silicon press release link below. Also Kintex-7 will not work... it just does not contain enough GTs to implement the full HMC interface which if I can recall requires about ~70 lines/pins. If you look at the 7-series over view data sheet DS180 you'll see that Max transceiver count for Kintex is 32 whereas Virtex is 96.

 

https://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf

 

https://www.xilinx.com/news/press/2014/xilinx-and-open-silicon-announce-hybrid-memory-cube-controller-ip-for-all-programmable-fpgas.html

 

https://www.xilinx.com/support/documentation/white_papers/wp456-DDR-serial-mem.pdf

 

http://www.memcon.com/pdfs/keynote_scottgraham.pdf

 

Regards,

T

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Moderator
Moderator
440 Views
Registered: ‎11-28-2016

Re: HMC memory and Artix-7?

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Hello @johnvivm,

HMC memory is only supported in UltraScale and UltraScale+ FPGAs and shouldn't be considered for a new design since HMC memory production is going EOL.
For 7-Series memory interface rates Artix-7 does have lower maximum frequencies than Kintex and Virtex devices.

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Advisor evgenis1
Advisor
438 Views
Registered: ‎12-03-2007

Re: HMC memory and Artix-7?

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Hi @johnvivm , 

I've used HMC in a couple of projects targeting Ultrascale chips. Here are some words of caution:

- HMC datasheets only publish peak performance numbers, which only work for the best-case scenario of sequential reads or writes. If you have random-access read/write patterns, the performance drops by an order of magnitude.

- Power consumption might be higher than you expect because of the multi-gigabit serial interfaces.

- HMC roadmap is unclear. It looks like the industry gears towards HBM. I haven't seen any new HMC silicon, and major HMC FPGA IP core updates in the last 1-2 years.

 

Thanks,

Evgeni

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Voyager
Voyager
417 Views
Registered: ‎08-16-2018

Re: HMC memory and Artix-7?

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@tenzinc

A more precise question could be: is it possible to interface an HMC to an Artix-7 FPGA, even if not the full HMC protocol, to have more bandwidth than using DDR (which is limited to 1066 Mb/s)?

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Voyager
Voyager
416 Views
Registered: ‎08-16-2018

Re: HMC memory and Artix-7?

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@ryana

There is an HMC IP for Kintex-7. Nevertheless, it seems as a product is going defunct. 

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