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Voyager
Voyager
690 Views
Registered: ‎10-12-2016

about DDR controller input clock(generated by MIG) ?

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Hi Friends,

 

I have generated DDR3L memory controller and PHY using MIG. for this testing purpose i used on board differential clock as input to the controller.

But later can i use internal clock , like clock generated from MMCM or PLL . ?

 

 

Thank You 

S Sampath 

 

 

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Xilinx Employee
Xilinx Employee
949 Views
Registered: ‎09-20-2012

Re: about DDR controller input clock(generated by MIG) ?

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Hi @ssampath

 

Yes, it is possible to use internally generated clock with 7 series MIG sys_clk input. However this is not recommended.

Thanks,
Deepika.
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Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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Xilinx Employee
Xilinx Employee
950 Views
Registered: ‎09-20-2012

Re: about DDR controller input clock(generated by MIG) ?

Jump to solution

Hi @ssampath

 

Yes, it is possible to use internally generated clock with 7 series MIG sys_clk input. However this is not recommended.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
0 Kudos