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Visitor tharvid
Visitor
8,822 Views
Registered: ‎04-04-2014

Aurora 8b/10b configurations

Hello!

 

I am using Aurora 8b/10b and Kintex 7 with the following settings:

Lane width: 4

Line Rate: 5

Refclk: 125

Duplex

Framing

 

I have a some questions:

1. Can I change the AXI frequency so it doesnt use the refclk frequency? I want to connect it with a 200 MHz clock used in an other device.

2. When generating the example design i get some configurations that seem wrong when i look in documentation (PG046 etc.) What is correct?

  * DRP_CLK is set to 50 MHZ

  * INIT_CLK to 200 MHZ (shouldnt this be less than ref_clk?).

  * RXOUT_DIV and TXOUT_DIV is set to 0 which is not allowed. If i change this it works. If i generate the IP with default settings this does not happen. Is this a known issue?

3. I want to use the same ref clk to 4 Aurora IP. Is there a guide on how to do this?

 

Thank you

/Thomas

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2 Replies
Scholar samcossais
Scholar
8,817 Views
Registered: ‎12-07-2009

Re: Aurora 8b/10b configurations

I am doing the same thing. I use Aurora 8b10b v10.0.

There are quite a lot of weird things done in the example design to be entirely honest.

 

The aurora_8b10b_0_support_reset_logic.v does not look correct to me (gt_rst_sync cannot deassert because the GT RESET signal it produces reset the source of its synchronization clock...)

 

Even in the core itself, I've just looked for a few minutes and already found some very basic bugs.

 

For instance in aurora_8b10b_0_rx_startup_fsm.v line 610 :


    if (RX_QPLL_USED == "TRUE" && TX_QPLL_USED == "FALSE")

        [...]

    else if (RX_QPLL_USED == "FALSE" && TX_QPLL_USED)
        [...]


 

 

that I believe should be replaced by :


    if (RX_QPLL_USED == "TRUE" || TX_QPLL_USED == "TRUE")
        [...]
    else if (RX_QPLL_USED == "FALSE" && TX_QPLL_USED == "FALSE")
        [...]


if QPLL used

    -> assert QPLL_RESET

else if both QPLL are not used (which should mean that then CPLL is used)

    -> assert CPLL_RESET

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Scholar samcossais
Scholar
8,816 Views
Registered: ‎12-07-2009

Re: Aurora 8b/10b configurations

I know Aurora is a free IP but this looks like some more verification should be needed...

 

Or maybe Xilinx should make it more simple. All these reset and board debug signals everywhere look a bit messy to say the least. In my case I just need a free and ready for use GT interface and I expected Aurora to be this. Last time I used it (with an older version), I already had problems with the reset and I had to correct a few things in the code after failures in hardware.

 

This time I already have problems in simulataion. I don't need that many debug functions and I don't use any push button or anything like that so please keep it simple for the user.

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