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Registered: ‎09-01-2011

Virtex 6 GTH Transceiver by Wizard: Error on simulation.

I've got a little problem by simulating a design with a GTH transceiver wrapper built up by the "Virtex 6 GTH transceiver wizard v1.8". (using the transceiver and the wizard the first time).


I used the instantiation model which was provided through the wrapper wizard for my design. When I try to simulate the model, it does not start up. Instead, the following output is generated:


Regenerate Core - ethernet_mac_simplex_recv: All required files are available.

Process "Regenerate Core" completed successfully
WARNING: the Core Generator generated file 'gth_transceiver_4duplex/implement/shared_vio.ngc' was not found in '[...]/ipcore_dir/'.
WARNING: the Core Generator generated file 'gth_transceiver_4duplex.veo' was not found in '[...]/ipcore_dir/'.
Regenerate Core - gth_transceiver_4duplex: All required files are available.
WARNING: the Core Generator generated file 'gth_transceiver_4duplex/implement/shared_vio.ngc' was not found in '[...]/ipcore_dir'.
WARNING: the Core Generator generated file 'gth_transceiver_4duplex.veo' was not found in '[...]/ipcore_dir'.

Process "Regenerate Core" failed


I have nothing named ...VIO... and I didn't find anything about that in in the transceiver nor in the wizard documentation .


As an idea of the root of this problem:  there is existing an example design for the core which uses some components named VIO (ChipScope Pro Virtual Input/Output), obviously made for observing internal behavior. I don't like to use this component and I don't see the need of this. Instead I follow the strategy to keep my own design as simple as possible. In the example, it's used only in the to level and instances of this component are only wired, if a generic (of the examples top level but not of the used wrapper) named "EXAMPLE_USE_CHIPSCOPE" is set. So I think (and hope) I don't need this component. But somehow, there could be left a kind of switch which refers to component. (not found yet and ... if I switch EXAMPLE_USE_CHIPSCOPE off and generate the example, the failure in my own project stays)


... this is only an assumption. I found nothing else corresponding to this failure.


Does anyone have an idea of:

1) How can I bring up my design avoiding this failure

2) Am I right with my assumption that this is a left part of an observing component, which isn't necessarily needed.


Thanks for help ...

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Registered: ‎09-01-2011

Re: Virtex 6 GTH Transceiver by Wizard: Error on simulation.

A little Update: The problem is not fixed for normal workflow, but here is a work around:


The problem was not a consequence of the unused ChipScope component but has to do with the example design. In the "coregen.log" file, there can be found the entry


WARNING:coreutil -  This core does not have a top level called
WARNING:coreutil -  Top level has been set to "/gth_transceiver_4duplex_top"

, where "gth_transceiver_4duplex" is the name of the core, given by the add file dialog. The "<name>_top" is the top level of the example, that should not be used for the personal design. Where to find the entry for the top level to choose, I don't know yet.

The problem is fixed by removing the core from the project and adding just the generated .vhd files from the ipcore dir (in a verilog design it should be .v).

This solution failed at first, maybe because of already having implemented the example by the "implement.bat" or the "implement.sh". After I removed the ip core component from the project, deleted the associated files in the ipcore dir, added the ipcore a second time and then follow the way described in the last paragraph, it worked.


To get rid of the warnings, too, you can remove the "coreutil"-calls of the files mentioned by the warnings from the file <ipcore dir>/<component name>_xmdf.tcl. But that's just a workaround, too ;).


Hope this will help somebody else but me, too.

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