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Visitor mbrainin
Visitor
7,197 Views
Registered: ‎07-09-2015

PL device access from BM with OpenAMP

Hi,

 

I'm running an OpenAMP configuration with Linux on CPU0 and baremetal on CPU1.

I also have an AXI4 Stream FIFO connected to the ZYNQ which is mapped to 0x43c00000.

 

When I try setting up FIFO via the baremetal, I get a DataAbort Exception during the XLlFifo_CfgInitialize() function. I was able to get past this exception by setting the MMU Level 1 as a full-access, shareable device (0xC06).

Now I get the DataAbort exception when I call XLlFifo_IntClear() function, and I cannot seem to get past that point.

 

Also, I can access other PL devices (i.e. GPIOs) via the baremetal on cpu1, but not the FIFO.

 

If I run both processors in baremetal (no linux), I have full access to the FIFO from CPU1 without any problems. So I am fairly confident my setup of the FIFO on cpu1 is correct. I'm just not sure what linux is doing to not allow me to access the memory via the baremetal.

 

Do I need to setup the FIFO in the resource table in order to get access to it from CPU1?

If so, I have not seen any examples of using the resource table.

 

Thanks,

Misha

 

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2 Replies
Xilinx Employee
Xilinx Employee
6,942 Views
Registered: ‎02-12-2013

Re: PL device access from BM with OpenAMP

Did you have FIFO device node in the device tree of the Linux?

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Visitor mbrainin
Visitor
6,828 Views
Registered: ‎07-09-2015

Re: PL device access from BM with OpenAMP

I did initially, and I also tried removing it so linux has no knowledge of it, but I got the same DataAbort exception on the remote when I tried accessing the FIFO. That seems odd.

 

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