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Visitor mayong
Visitor
688 Views
Registered: ‎09-03-2017

Zynq AMP - CPU1 baremetal access to SDIO0 about XSdPs_Get_Bus_Width

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I currently use AMP mode, CPU1 runs bare-core programs, CPU0 runs linux, CPU1 uses fatffs, SDIO0 SD cards, but Linux together has problems, running CPU1 programs before Linux starts is no problem, basically stuck in XSdPs_InCarditialize-> XSdPs_Get_Bus_Width, has been before. It is doubtful whether the frequency is a problem or not. The initialization of SDIO is normal. It is doubtful that the registers related to DMA are checked at the XSdPs_SetupADMA2 DescTbl() function. The registers related to DMA have been configured with 0xf8f01100-0xf8f01108, 0xF800012C, 0xF8F01830, 0xF8000120 registers, but they are still not good. How can I configure them? It can pass. The version of XILFFS3.1 currently in use.

void SDIO_CLK_Write(void)
{
	unsigned char i;

	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000008,(Xil_In32(0xF8000008)));
//	Xil_Out32(0xF800012C, (Xil_In32(0xF800012C) | 0x00000401));  //  SLCR Write Protection Unlock
	Xil_Out32(0xF8000008, (0x0000DF0D));  //  SLCR Write Protection Unlock
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000008,(Xil_In32(0xF8000008)));

	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF800012C,(Xil_In32(0xF800012C)));
	Xil_Out32(0xF800012C, (Xil_In32(0xF800012C) | 0x00000401));  // AMBA外围时钟控制寄存器  SDIO0  10bit  DMA 0bit
//	Xil_Out32(0xF800012C, (0x01FF44CD));  // AMBA外围时钟控制寄存器  SDIO0  10bit  DMA 0bit
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF800012C,(Xil_In32(0xF800012C)));

	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000150,(Xil_In32(0xF8000150)));   //SDIO_CLK_CTRL
	Xil_Out32(0xF8000150, (Xil_In32(0xF8000150) |  0x00000001));
//	Xil_Out32(0xF8000150, (0x00000501));//50MHZ SDIO0 clk Enable
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000150,(Xil_In32(0xF8000150)));

	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8F01838,(Xil_In32(0xF8F01838)));
	Xil_Out32(0xF8F01838, (Xil_In32(0xF8F01838) & 0xfffffffe | 0x00000002));   //中断目标寄存器配置   56 sdio0
//	Xil_Out32(0xF8F01838, (0x00000002));   //中断目标寄存器配置   56 sdio0
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8F01838,(Xil_In32(0xF8F01838)));

	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8F01830,(Xil_In32(0xF8F01830)));
//	Xil_Out32(0xF8F01830, (Xil_In32(0xF8F01830) & 0xfffffffe | 0x00000002));   //中断目标寄存器配置   48 DMA2
	Xil_Out32(0xF8F01830, (0x02020202));   //中断目标寄存器配置   48 DMA2
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8F01830,(Xil_In32(0xF8F01830)));


	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8F0182c,(Xil_In32(0xF8F0182c)));
//	Xil_Out32(0xF8F01830, (Xil_In32(0xF8F01830) & 0xfffffffe | 0x00000002));   //中断目标寄存器配置   48 DMA2
	Xil_Out32(0xF8F0182c, (0x02020202));   //中断目标寄存器配置   48 DMA2
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8F0182c,(Xil_In32(0xF8F0182c)));

	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000120,(Xil_In32(0xF8000120)));
	Xil_Out32(0xF8000120, (Xil_In32(0xF8000120) & 0xe0ffffff | 0x1f000000));   //ARM_CLK_CTRL  CPU_3x2x Clock control
	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000120,(Xil_In32(0xF8000120)));

	ICDISER_Register_Write(48);
	ICDISER_Register_Write(47);
	ICDISER_Register_Write(49);
	ICDISER_Register_Write(46);
	ICDISER_Register_Write(45);
	ICDISER_Register_Read();
//
//	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000148,(Xil_In32(0xF8000148)));
//	Xil_Out32(0xF8000148, (Xil_In32(0xF8000148) & 0xffffffffe | 0x00000001));   //SMC_CLK_CTRL
//	xil_printf("the value of 0x%08x is 0x%08x\n\r", 0xF8000148,(Xil_In32(0xF8000148)));
//
//	for(i = 0; i<3; i++)
//	{
//		xil_printf("the value of 0x%08x is 0x%08x\n\r", (0xF8000100 +4*i),(Xil_In32((0xF8000100 +4*i))));
//		Xil_Out32((0xF8000100 +4*i), (Xil_In32((0xF8000100 +4*i)) & 0xffffffff7));   //ARM_PLL_CTRL DDR_PLL_CTRL IO_PLL_CTRL
//		xil_printf("the value of 0x%08x is 0x%08x\n\r", (0xF8000100 +4*i),(Xil_In32((0xF8000100 +4*i))));
//	}

}

 

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Visitor mayong
Visitor
613 Views
Registered: ‎09-03-2017

Re: Zynq AMP - CPU1 baremetal access to SDIO0 about XSdPs_Get_Bus_Width

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No, I donot use SDIO0 in linux,Now i find that the question is the functon "XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, SCR)",all functions i use included this function is all failed, so i think it is the reason, 

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2 Replies
Moderator
Moderator
638 Views
Registered: ‎05-10-2017

Re: Zynq AMP - CPU1 baremetal access to SDIO0 about XSdPs_Get_Bus_Width

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Does Linux also use SDIO-0? You can't share peripherals. You will need to disable SD0 from your linux device-tree

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Visitor mayong
Visitor
614 Views
Registered: ‎09-03-2017

Re: Zynq AMP - CPU1 baremetal access to SDIO0 about XSdPs_Get_Bus_Width

Jump to solution

No, I donot use SDIO0 in linux,Now i find that the question is the functon "XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, SCR)",all functions i use included this function is all failed, so i think it is the reason, 

0 Kudos