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Anonymous
Not applicable
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Ative clocks in a clock region

I am going through UG472 and I see that there are 4 clock capable inputs and 4 BUFRs per clock region. Is there a limit to how many clocks can be simultaneously active in the region? If I am satisfying the frequency limits, can I have 4 simultaneously active regional clocks (CC pin -> BUFIO -> BUFR)?

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Scholar
Scholar
4,614 Views
Registered: ‎02-27-2008

Yes,

 

The only limitation is power which creates heat (junction temperature must remain within the recommended range).

 

You are allowed to use everything, all at once, as much as you need.  As long as the tools create a bitstream, that is all you need.

 

If your timing constraints are correct (as well as choice of pins) and all design rules are met, it should work as designed.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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