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gtushar

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01-11-2017 01:32 AM

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Registered:
02-08-2016

CRC32 Ethernet Implementation issue

Hi, I have an Ethernet 10G MAC IP in which I am trying to calculate the CRC for the transmitter logic.

Here are the specs:

- I have an 8-byte wide data bus.

- I am using an 8-byte Parallel CRC generator.

My issue is:

When the packet length is, lets say, 14-bytes then in 1-clock cycle I am able to calculate the correct CRC for the first 8-bytes (using the 8-byte parallel CRC generator) but when I try to generate the CRC for the remaining 6-bytes in the next clock cycle using the same CRC generator, I get wrong results. What should I do?

4 Replies

evgenis1

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01-12-2017 01:21 PM

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Registered:
12-03-2007

gtushar

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01-15-2017 09:53 PM

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02-08-2016

evgenis1

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01-15-2017 10:49 PM

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12-03-2007

Hi,

>> I mean, if there is a way through which I can nullify the Zero effect in CRC-32 calculation

Yes, it's possible to implement that. I've seen it done in designs with 1024-bit and higher data widths.

In finite field theory it's called something like "negative matrix rotation".

Think about trailing zeros after the end of packet as multiplication of an original packet to a constant. You can calculate CRC on the packet + trailing zeros, then perform an "adjustment" operation to offset the effect of that constant multiplication.

Thanks,

gtushar

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01-15-2017 11:30 PM

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Registered:
02-08-2016

Can you tell me something about "adjustment" ? How in CRC-32 calculations can I do that?

Thanks