cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Anonymous
Not applicable
6,462 Views

Can't Identify JTAG chain because of Voltage-Level Translator

Hi,all.
I am using Xilinx XC7V2000T, and I place a Voltage-Level Translator, which is TXB0108, between JTAG and FPGA.
Now the JTAG chain can't be identified.
Vivado showed as below:
open_hw_target [lindex [get_hw_targets -of_objects [get_hw_servers localhost]] 0]
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210203369470A
ERROR: [Labtools 27-2269] No devices detected on target localhost/xilinx_tcf/Digilent/210203369470A.
Check cable connectivity and that the target board is powered up then
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
Then I used oscilloscope to test JTGA's TDI TDO TCK and TMS, all is normal, but the output of TXB0108 is strange.

JTAG's TCK is

TCK_J.jpg

And the output of TXB0108 is as below:

TCK_F.jpg

I don't know why this happened.

Thanks.

0 Kudos
6 Replies
Highlighted
Moderator
Moderator
6,458 Views
Registered: ‎07-23-2015

@Anonymous Can you share the Schematic of this interface. 

- Giri
--------------------------------------------------------------------------------------------------------------------
There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered.
Keep conversing, give Kudos and Accept Solution when you get one.
-----------------------------------------------------------------------------------------------------------------------
0 Kudos
Highlighted
Anonymous
Not applicable
6,432 Views

The schematic of JTAG's interface is:

TXB0108.png

JTAG.png

Where the signal names end with "P1V8" are those that connect to FPGA.

Thanks.

0 Kudos
Highlighted
Visitor
Visitor
6,403 Views
Registered: ‎06-08-2016

Hi Marine.

 

Your problem seems to come from the TXB0108. The datasheet from TI, P.15, indicates :

Any external pulldown or pullup resistors are recommended to be larger than 50k.

You have 10k pullup resistors on TMS and TCK (R92, R93).

Did you try to change these resistors for higher values?

Also, it's not very clear in the datasheet, but in the functional diagram channel 2 to 8 seems to share the same 'one shot' circuit for the bus direction. Can this be clarified from TI?

 

 

 

0 Kudos
Adventurer
Adventurer
6,400 Views
Registered: ‎02-24-2012

Additionally, verify your SI and the minimum pulse width. Overshoots and undershoots (violates absolute maximum ratings of TXB0108) look like bad impedance matching.

0 Kudos
Highlighted
Anonymous
Not applicable
6,389 Views

I have changed the resistors from 10K to 50K, and I also removed the resistor, nothing changed.

In addition, I think the detail of channel 2-7 is the same, so the datasheet only draws one diagram.

I didn't contact TI.

Thanks.

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
6,265 Views
Registered: ‎08-01-2012

Yes, the output of TXB0108 is strange. Please check the below things

  1. There could be some Signal Integrity (SI) problem in the TCK path. Please reduce the TCK speed and try once.

 

  1. Please check whether any connectivity problem exists in TCK and ad ground pins. There could some contact problem
  2. If you have spare cable please change cable and try once.
  3. Change host PC port.
  4. Verify ‘Vref’ voltage on the JTAG connector. It should be equal to VCCAUX voltage of FPGA
________________________________________________

Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer.

Give kudos to this post in case if you think the information is useful and reply oriented.

0 Kudos