11-08-2019 12:42 AM
Hi!
I use an FPGA 'xc7a35tcpg236-1' on BASYS3 with Vivado 2019.1 and Verilog.
I want to change a clock frequency from 100MHz to other frequencies, but the frequencies are difficult to generate by using counters. (ex. 13.56MHz, 33.33MHz)
Does anyone know how to generate these frequencies?
11-08-2019 02:26 AM
Use one of the on chip MMCM's.
See this doc for detail on this block:
https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf
To add one into your design you can use the clocking wizard IP located in Vivado's IP Catalog whcih provides a strait forward user interface. See:
https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v6_0/pg065-clk-wiz.pdf
11-08-2019 02:26 AM
Use one of the on chip MMCM's.
See this doc for detail on this block:
https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf
To add one into your design you can use the clocking wizard IP located in Vivado's IP Catalog whcih provides a strait forward user interface. See:
https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v6_0/pg065-clk-wiz.pdf