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prakashdrj
Observer
Observer
5,775 Views
Registered: ‎07-12-2016

Characterizion of 7 Series GTX

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Hello All,

 

I am working on custom protocol, which has 5 GT/s. I feel that whatever parameter generated by Wizard not fulfil the requirement so want to change it.

 

Is there any method or algo to do so? I have already used the parameters as per UG746.

 

How can I use eye scan/sweep to determine the parameterization of GTX?

 

Regards,

Prakash

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venkata
Moderator
Moderator
6,237 Views
Registered: ‎02-16-2010
Use IBERT and run eye scan with your application data. This helps to know the eye opening after the equalizer inside the GT receiver.
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balkris
Xilinx Employee
Xilinx Employee
5,756 Views
Registered: ‎08-01-2008
check this ARs
http://www.xilinx.com/support/answers/60024.html

check this document as well
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_4/ug908-vivado-programming-debugging.pdf
Thanks and Regards
Balkrishan
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venkata
Moderator
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Registered: ‎02-16-2010
What is your requirement? How do you confirm if the requirement is fulfilled?
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prakashdrj
Observer
Observer
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Registered: ‎07-12-2016

@venkata @balkris

I have used parameters as generated by wizard it self.

 

I am observing bit loss after some interval, then switched to IBERT and concluded that BER with that generated parameters are not giving required BER, required one 10^-12.

 

How can I obtain those valid parameter valuation?

 

Regards,

Prakash

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venkata
Moderator
Moderator
5,587 Views
Registered: ‎02-16-2010
Check if the refclk you use meets the required phase noise mask as mentioned in AR#44549
http://www.xilinx.com/support/answers/44549.html

Please try to use different values for TXDIFFCTRL, TXPRECURSOR, TXPOSTCURSOR. Check the ug476 for mapping of different values set to these inputs and with the Tx driver voltage and pre/post emphasis levels.
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prakashdrj
Observer
Observer
5,563 Views
Registered: ‎07-12-2016

@venkata,

 

REF clock has same profile as your pointed AR.

 

In our case TX side is behaving properly. But RX side we observe the bit loss. Other than ref clock what are the cause of bit loss?

 

Your help is appreciated a lot.

 

Best Regards,

Prakash

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venkata
Moderator
Moderator
6,238 Views
Registered: ‎02-16-2010
Use IBERT and run eye scan with your application data. This helps to know the eye opening after the equalizer inside the GT receiver.
------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------

View solution in original post

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