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Participant
Participant
611 Views
Registered: ‎03-21-2014

Constraints with external parameter

Dear all,

I need to lock a register to a PIN in my project. My problem is that the same project has 2 versions differing by the physical position of that pin in the pin association map. Is it possible to have an "intelligent" constraint file interpreted at compilation stage like:

 

`ifdef A 

set_property LOC OLOGIC_X1Y146 [get_cells TRGBUS_TX_BLOCK/RSYNC_reg]

`else

set_property LOC OLOGIC_X1Y0 [get_cells TRGBUS_TX_BLOCK/RSYNC_reg]

`endif

 

?

 

Best

Luca

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Voyager
Voyager
610 Views
Registered: ‎08-16-2018

I wonder too if xdc accepts that kind of pragmas.

The "intelligence" I would suggest is the common sens and organization to keep two sets of files associated to each project variant.

It happens everywhere, is not a thing to be ashamed of.

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Participant
Participant
608 Views
Registered: ‎03-21-2014

Thanks, could you point me to an example?

 

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Voyager
Voyager
574 Views
Registered: ‎08-16-2018

---- <projectA> folder
             |
             |-----------<variant1> folder
             |-----------<variant2> folder

 

Actually, Vivado allows having a number of constraint files that can be activated or deactivated (so chosen). I bet a tcl command can do that, so without duplicating files it could be reduced to that operation. 

 

Pragmas and conditional pre-compile stuff is something that some sw folks love. It creates an apparent simplicity based on a clear complexity. That's not smart in my opinion, just cool from the outside, in power point, etc. 

If your justification for that conditional constraining is "one more less thing I can forget to set up", remember that you (or some human) will still be responsible for setting the right value of the condition for each project, so, at the end, you have more lines of code and the same chances of making a mistake,

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