Delay output generated data (OSERDES)

[485337]

Hello.

Is it possible variable delay output data after OSERDES? Thanks.

[avrumw]

It depends on the family and the type of I/O.

In some architectures, the ODELAY is present and can (only) be inserted right before the OBUF; so between the OBUF and either the OSERDES, ODDR or SDR IOB flip-flop, or (less usefully) fabric routing.

But, in the 7 series, the ODELAY is only present on "High Performance (HP)" I/O - it is not present on "High Range (HR)" I/O. In UltraScale and UltraScale+ it is available on all pins.

The ODELAY is a programmable delay element capable of inserting some amount of delay. In the 7 series, it is fully PVT calibrated, and provides a constant amount of delay per tap - depending on the calibration clock, you can get up to 2.5ns of delay in 32 steps. In UltraScale, the calibration is different, but in some modes can also provide a fixed amount of delay.

Avrum

[485337]

I use Virtex5.

What I find in UG on page326. It turns out that variable delay is impossible?

[avrumw · Accepted solution]

(You should have mentioned you are using Virtex-5).

Yes, in Virtex-5 the IODELAY cannot be used as a variable delay in output mode.

Avrum