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Visitor cfs1
Visitor
721 Views
Registered: ‎05-07-2018

Difficulty using XADC channel sequencer while in DRP mode with Arty z7



Hi - I've been trying to implement a design based on the XADC demo for the Arty z7-10, but I've been having difficulty figuring out exactly how to properly switch between 3 channels (VP/VN, A0 and A1) when in DRP mode with the channel sequencer.  I've attempted to use the switches to alternate channels as in the example design, though what I would ultimately like to do is poll each channel at a regular timed interval.  Attached are my modifications to the example verilog source, any help would be greatly appreciated.

-Chris

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Moderator
Moderator
666 Views
Registered: ‎04-18-2011

Re: Difficulty using XADC channel sequencer while in DRP mode with Arty z7

The Automatic channel sequencer will sequence through the selected channels one after the next and issue an end of conversion pulse, EOC, when it has converted it. 

You should take some time to read UG480 to understand the XADC timing. 

 

Keith

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Visitor cfs1
Visitor
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Registered: ‎05-07-2018

Re: Difficulty using XADC channel sequencer while in DRP mode with Arty z7

Thank you for your reply klumsde.  I have been reading through the manual - though I guess what I am a bit confused about is how to acquire data from only one channel at a time.  It seems that anything I have implemented has either no channels active or several active all at once.

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Moderator
Moderator
627 Views
Registered: ‎04-18-2011

Re: Difficulty using XADC channel sequencer while in DRP mode with Arty z7

I would advise you to forget the DRP for the moment, set up the XADC in the wizard and enable the sequencer and select the channels you want.
Add an ila and capture the channel output eoc and for as well as busy.
Trigger the ila a few times and see that the sequencer is running and giving you what you expect. Look at the timing of busy and eoc and the channel bits.


Then work on enabling drp reads
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