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Visitor f1t3
Visitor
1,007 Views
Registered: ‎09-06-2018

IO current limits on Zynq, driving a small MOSFET

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Hello.

 

The Znyq I/O datasheet states, that the I/O current must not exceed 20mA per pin, while the current througt the whole I/O bank must not exceed 200mA.

 

I intend to drive the MOSFETs of an H bridge at 200kHz, with a 3.3V / 20mA = R to limit the peak current. The MOSFETs are ver, small IRLML6244 with 7nC total gate charge,  Is this a save thing to do? The only concern I have so far is, that the current peak causes a voltage drop over internal resistors, and therefore causing problems with the logic levels etc.

 

Also is the 20mA a absolute peak value? I wonder if it was save to decreas R to R / 2 to increase switching time.

 

Thank you very much for your help and time.

 

 

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Advisor evgenis1
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984 Views
Registered: ‎12-03-2007

Re: IO current limits on Zynq, driving a small MOSFET

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Hi @f1t3 , 

 

To increase effective IO current drive strength, multiple IOs can be wired together. I used to do it in my Virtex-5 and 6 designs. This technique might work in Zynq, but it's worth checking with Xilinx FAE. Of course, those wired IOs have to be driven simultaneously by the FPGA logic. 

 

Thanks,

Evgeni

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4 Replies
988 Views
Registered: ‎12-22-2016

Re: IO current limits on Zynq, driving a small MOSFET

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Given the 1A is actually 1C/s. With 7nC to transfer, you will reach 20mA at 1/2857142sec. This means one full transition in 350ns, 1.428 MHz, so to speak. Running it at 200kHz is safe. Your rise/fall time will be however that 350ns+ (when limiting to 20mA by a resistor) of your 5000ns period (7% of UI)

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Advisor evgenis1
Advisor
985 Views
Registered: ‎12-03-2007

Re: IO current limits on Zynq, driving a small MOSFET

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Hi @f1t3 , 

 

To increase effective IO current drive strength, multiple IOs can be wired together. I used to do it in my Virtex-5 and 6 designs. This technique might work in Zynq, but it's worth checking with Xilinx FAE. Of course, those wired IOs have to be driven simultaneously by the FPGA logic. 

 

Thanks,

Evgeni

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Visitor f1t3
Visitor
948 Views
Registered: ‎09-06-2018

Re: IO current limits on Zynq, driving a small MOSFET

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@rozsnyo-daniel this is a very conservative calculation (in terms of current consumtion) because 1) the MOSFET has a Vgs,th of only 1,x V or so and 2) the current decreases as Vgs increses, right? So you have no second guessings about using the full 20mA span?

@evgenis1 thank you very much sir! This is one of those cases where you don't see the trees because of all that forest.I have to check how much pins are left available in the design, but maybe this is the best way to go.

In any case: What is to think of exceeding the 20mA per pin limit for a very short time to say 40-50mA, while keeping the RMS value still (far) below 20mA?
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Registered: ‎01-22-2015

Re: IO current limits on Zynq, driving a small MOSFET

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@f1t3

 

 In post found <here> about ZedBoard, @austin says:

 

" The IO are incredibly robust:  shorting them to ground, or Vcco will not hurt them. "

 

Mark