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824 Views
Registered: ‎09-08-2016

Number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7

I have created a custom IP using Xilinx Vivado with Artix-7 FPGA. The AXI bus is used in between the 32-bit Microblaze and custom IP. I need to send the inputs to the custom IP from the Microblaze via 32-bit AXI bus. Similarly, the data output from the custom IP needs to be transferred to the Microblaze via 32-bit AXI bus. What would be the number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7 fpga?

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4 Replies
Scholar embedded
Scholar
814 Views
Registered: ‎06-09-2011

Re: Number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7

asanbasiri@gmail.com,

it needs only one clock cycle of processor to write a value on the AXI bus. Besides, you can do a simulation or connect a chipscope core and probe the signals.

 

Hope this will help,

Hossein

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808 Views
Registered: ‎09-08-2016

Re: Number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7

Thanks for your reply.

 

Please let me put this in simple words.

 

I use AXI lite between the 32-bit microblaze and custom IP. I can use many number of AXI lite buses between the both. The AXI lite can be used to transfer a 32-bit data between the same. AXI lite does not need any FIFO connections.

 

Please let know whether the below statement correct or not.


As per your statement, the cycles required to transfer a 32-bit data between the microblaze and custom IP via AXI lite is 1 cycle.

 

Please send me a document for this if possible. I look forward to your quick reply.

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Scholar dpaul24
Scholar
767 Views
Registered: ‎08-07-2014

Re: Number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7

asanbasiri@gmail.com,

 

There are a few things I can clarify.

 

The AXI bus is used in between the 32-bit Microblaze and custom IP.

Are you using an AXI Interconnect IP core between your custom IP and the uBlaze?

If, yes read the AXI Interconnect IP core docu, specially the 'Latency' section. Add this latency to the no. of AXI clk cycles required for AXI for R/W (AMBA AXI spec).

If not, then it should be a direct AXI connection with the uBlaze being the M and your custom IP being the S (assumption on the M & S). In that case, just look at the AMBA AXI specification. You would know how many clk cycles it needs to R/W.

 

Nevertheless if you have a proper working simulation, then you can manually count the no. of clk cycles required to READ and WRITE data.

 

Depending on the nature of data to be transferred you choose AXI4 or AXI4-Lite.

 

Please send me a document for this if possible. I look forward to your quick reply.

A search engine will be your friend!

 

 

 

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760 Views
Registered: ‎09-08-2016

Re: Number of cycles required to transfer data between 32-bit microblaze and custom IP in artix7

thanks

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