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1,435 Views
Registered: ‎09-22-2016

Problem programming SPI prom with encrypted bitfile (Artix7)

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Hi,

We have been successfully programming our custom hardware for some time - both programming the Artix 7 FPGA (XC7A75T) directly and programming the SPI PROM (N25Q128-3.3V-SPI) - through the JTAG port (using a Digilent USB programmer).  We are using Vivado 2016.4    Note that the only items on the JTAG chain are the Artix7 and the N25Q128 PROM.

As a final step we need to encrypt the BIT file - so as to protect the IP.   This has been done by creating an encryption key (which has been successfully programmed into the FPGA eFuse) and by regenerating the .BIT and .NKY files using the same encryption key.

We can successfully program the FPGA with the encrypted bitfile directly through the JTAG programmer, however the PROM will no longer program.   The error message is:

if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE  [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] }  { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; };
ERROR: [Labtools 27-3165] End of startup status: LOW
ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors.

Can anyone suggest a solution ?

---------

Successful programming of the FPGA directly (using Hardware Manager) - as per the Tcl Console:

# open_hw
# connect_hw_server
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2016.4
  **** Build date : Dec 14 2016-22:58:11
    ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.

connect_hw_server: Time (s): cpu = 00:00:01 ; elapsed = 00:00:05 . Memory (MB): peak = 1390.711 ; gain = 0.000
# open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210299A17D84
# set_property PROGRAM.FILE {View_190_Prototype_HD_AR0330.bit} [lindex [get_hw_devices xc7a75t_0] 0]
# set_property PROBES.FILE {debug_nets.ltx} [lindex [get_hw_devices xc7a75t_0] 0]
# current_hw_device [lindex [get_hw_devices xc7a75t_0] 0]
# refresh_hw_device [lindex [get_hw_devices xc7a75t_0] 0]
INFO: [Labtools 27-2302] Device xc7a75t (JTAG device index = 0) is programmed with a design that has 2 ILA core(s).
create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q128-3.3v-spi-x1_x2_x4}] 0]
# create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q128-3.3v-spi-x1_x2_x4}] 0]
# set_property PROBES.FILE {debug_nets.ltx} [lindex [get_hw_devices xc7a75t_0] 0]
# set_property PROGRAM.FILE {View_190_Prototype_HD_AR0330.bit} [lindex [get_hw_devices xc7a75t_0] 0]
# program_hw_devices [lindex [get_hw_devices xc7a75t_0] 0]
INFO: [Labtools 27-3164] End of startup status: HIGH
# refresh_hw_device [lindex [get_hw_devices xc7a75t_0] 0]
INFO: [Labtools 27-1434] Device xc7a75t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.

---------

Unsuccessful programming of the PROM directly (using Hardware Manager) - as per the Tcl Console:

# open_hw
# connect_hw_server
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
# open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210299A17D84
# set_property PROGRAM.FILE {Program.bit} [lindex [get_hw_devices xc7a75t_0] 0]
# set_property PROBES.FILE {debug_nets.ltx} [lindex [get_hw_devices xc7a75t_0] 0]
# current_hw_device [lindex [get_hw_devices xc7a75t_0] 0]
# refresh_hw_device [lindex [get_hw_devices xc7a75t_0] 0]
INFO: [Labtools 27-1435] Device xc7a75t (JTAG device index = 0) is not programmed (DONE status = 0).
create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q128-3.3v-spi-x1_x2_x4}] 0]
# create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q128-3.3v-spi-x1_x2_x4}] 0]
# set_property PROBES.FILE {debug_nets.ltx} [lindex [get_hw_devices xc7a75t_0] 0]
# set_property PROGRAM.FILE {Program.bit} [lindex [get_hw_devices xc7a75t_0] 0]
# program_hw_devices [lindex [get_hw_devices xc7a75t_0] 0]
INFO: [Labtools 27-3164] End of startup status: HIGH
# refresh_hw_device [lindex [get_hw_devices xc7a75t_0] 0]
INFO: [Labtools 27-1434] Device xc7a75t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
# write_cfgmem  -format mcs -size 16 -interface SPIx4 -loadbit "up 0x00000000 Program.bit " -force -file "Program.mcs"
Command: write_cfgmem -format mcs -size 16 -interface SPIx4 -loadbit {up 0x00000000 Program.bit } -force -file Program.mcs
Creating config memory files...
Creating bitstream load up from address 0x00000000
Loading bitfile Program.bit
Writing file Program.mcs
Writing log file Program.prm
===================================
Configuration Memory information
===================================
File Format        MCS
Interface          SPIX4
Size               16M
Start Address      0x00000000
End Address        0x00FFFFFF

Addr1         Addr2         Date                    File(s)
0x00000000    0x003A607B    Jan 13 07:34:19 2018    Program.bit
0 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_cfgmem completed successfully
# set_property PROGRAM.ADDRESS_RANGE  {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.FILES [list "Program.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
# set_property PROGRAM.PRM_FILE {Program.prm} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
# set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.BLANK_CHECK  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.ERASE  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.CFG_PROGRAM  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.VERIFY  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.CHECKSUM  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# startgroup
# if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE  [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] }  { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; };
ERROR: [Labtools 27-3165] End of startup status: LOW
ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors.

    while executing
"program_hw_devices [lindex [get_hw_devices] 0]"
    invoked from within
"if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE  [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property P..."
    (file "R:/Vivado/View-190-Prototype-HD-AR0330/Source_AR0330/program_the_FPGA_and_PROM.tcl" line 27)
INFO: [Common 17-17] undo 'startgroup'

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1,934 Views
Registered: ‎09-22-2016

Re: Problem programming SPI prom with encrypted bitfile (Artix7)

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Hello markg,

 

Thank you for your assistance and suggestions.

 

After further examination of UG470, UG908, XAPP586 and XAPP1239, we finally found one small comment (XAPP1239 Table 4) that states that programming of the eFuse control register bit 0 will prevent Vivado performing indirect SPI/BPI flash programming flow.

 

eFuse bit 0 was set in the belief that it would force the FPGA to use the AES key ... and indeed this is the case.  However, the minor "caution" comment was missed and now the FPGA (on this test board) can no longer have its SPIx4 PROM programmed.  Annoying.

 

Regards.

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5 Replies
1,413 Views
Registered: ‎01-22-2015

Re: Problem programming SPI prom with encrypted bitfile (Artix7)

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Hi @engeltronics.com

 

Your attempts to program the N25Q128 PROM are ending at what is called the ID-check. During the ID-check, Vivado is trying to read an ID-code (see Table 19 in the Micron datasheet for N25Q128) from the PROM and compare it to the PROM description (probably n25q128-3.3v-spi-x1_x2_x4,  SPIx4) that you gave to Vivado.  When this ID-check is successful, you should get the following console output:

 

if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; };

INFO: [Labtools 27-3164] End of startup status: HIGH

program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]

Mfg ID : 20   Memory Type : ba   Memory Capacity : 18   Device ID 1 : 0   Device ID 2 : 0

Performing Erase Operation...

Erase Operation successful.

Performing Program and Verify Operations...

Program/Verify Operation successful.

INFO: [Labtoolstcl 44-377] Flash programming completed successfully

 

So, I suspect there is some problem reading the ID-code from the PROM.   I see you have specified the SPIx4 interface to the PROM.  Is this the interface you are using?  The SPIx1 interface is more common.

 

Mark

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Registered: ‎01-22-2015

Re: Problem programming SPI prom with encrypted bitfile (Artix7)

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…a few more thoughts. I am not familiar with BIT file encryption or setting the eFuse. However, I’m quite sure that the PROM itself does not care what kind of file you are sending. I also know that the FPGA can interfere with PROM programming either intentionally or if it is not configured properly.

 

During PROM programming, both Vivado and iMPACT will normally configure the FPGA so it does not interfere with PROM programming. However, for this security stuff you are doing, maybe the FPGA is intentionally interfering with PROM programming?

 

More to the point, maybe you can try to first program the PROM before you do the security things (encryption key, eFuse etc) with the FPGA.

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1,935 Views
Registered: ‎09-22-2016

Re: Problem programming SPI prom with encrypted bitfile (Artix7)

Jump to solution

Hello markg,

 

Thank you for your assistance and suggestions.

 

After further examination of UG470, UG908, XAPP586 and XAPP1239, we finally found one small comment (XAPP1239 Table 4) that states that programming of the eFuse control register bit 0 will prevent Vivado performing indirect SPI/BPI flash programming flow.

 

eFuse bit 0 was set in the belief that it would force the FPGA to use the AES key ... and indeed this is the case.  However, the minor "caution" comment was missed and now the FPGA (on this test board) can no longer have its SPIx4 PROM programmed.  Annoying.

 

Regards.

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1,347 Views
Registered: ‎01-22-2015

Re: Problem programming SPI prom with encrypted bitfile (Artix7)

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     ....and now the FPGA (on this test board) can no longer have its SPIx4 PROM programmed.

 

You may still save-the-day by using a 2nd board to place your encrypted BIT-file into the PROM. Then, unsolder this PROM from the 2nd board and solder it onto the board that has the FPGA with eFUSEs blown.

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Registered: ‎12-11-2017

Re: Problem programming SPI prom with encrypted bitfile (Artix7)

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I'm having a similar issue (see https://forums.xilinx.com/t5/Configuration/can-t-reprogram-SPI-on-encryption-enabled-target/m-p/937172) but my finding was different: the trouble didn't happen until I set R_EN_B_Key (disable reading of AES key, bit 3.) I was able to reprogram SPI with bit 0 (CFG_AES_Only) set.

Were you setting R_EN_B_Key as well, as Xilinx recommends?

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