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Contributor
Contributor
932 Views
Registered: ‎12-05-2017

T[3:0] pins vs. T[3:0]_DQS pins

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Hi,

 

I'm designing a LVDS DDR interface and I would like to know that is the difference between a T[3:0] pin and a T[3:0]_DQS pin. From the TRM (p.59) and some insights, the second seems to be more suitable for DDR interface.

 

For my LVDS DDR interface, I want the best configuration as possible (going up to 480MHz and more). Should I choose only T[3:0]_DQS pins instead of T[3:0] pins? What is the difference between both?

 

Thanks in advance for your answers.

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Moderator
Moderator
1,002 Views
Registered: ‎04-18-2011

Re: T[3:0] pins vs. T[3:0]_DQS pins

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T0/T1/T2/T3 refer to the memory byte group that the IO belongs to 

T0_DQS is the stobe for the memory byte group T0. 

 

These are dual use IO, you can use the bank for the memory controller or you can use it as you plan to for LVDS interfaces. 

There is no difference in the IOs in this case. 

 

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1 Reply
Moderator
Moderator
1,003 Views
Registered: ‎04-18-2011

Re: T[3:0] pins vs. T[3:0]_DQS pins

Jump to solution

T0/T1/T2/T3 refer to the memory byte group that the IO belongs to 

T0_DQS is the stobe for the memory byte group T0. 

 

These are dual use IO, you can use the bank for the memory controller or you can use it as you plan to for LVDS interfaces. 

There is no difference in the IOs in this case. 

 

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Don’t forget to reply, kudo, and accept as solution.
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View solution in original post