Can anybody tell me, where can I find the functional block scheme (structure) of the BANK of Artix-7 FPGA?
As was done for GTP transcivier in pdf UG482 (figure 1-2, 1-3,2-1)
I find these diagrams in pdf UG471
But I can't understand what do every block mean.
Where can I find the description of each blocks at 2 diagrams in the added picture?
Or where can I find more detailed diagrams of the IOB for XC7A100T or similar?