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ramu_seva
Observer
Observer
695 Views
Registered: ‎07-16-2019

VCCO Voltage stuck at 1.6 V - XC7V585T

Hi All,

We received a new board with XC7V585T fpga on it. We powered up the board and we see all the supplies up, but for some reason the VCCO voltage is stuck at 1.605 V.

We used separate regulators for VCCINT, VCCBRAM and VCCAUX voltages. We are not able to understand what can be the reason. We don't see any currents limiting. From our calculations it looks like the VCCO is taking current < 100 mA. 

Will ESD result in this voltage? What is the drop across the clamp diodes in this FPGA. I was thinking it is ~ 500 mV. Please let us know.

Most of the VCCO IO's are connected to LVDS IO's of ATE chip from analog devices. 

Any insight into this problem will help us.

Thanks in advance.

- Ramu

 

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8 Replies
bpatil
Xilinx Employee
Xilinx Employee
632 Views
Registered: ‎03-07-2018

Hi @ramu_seva 

Please check if you are driving FPGA IO's before VCCO is up and reaches at 90% of its specified level in datasheet. Please check https://www.xilinx.com/support/answers/44225.html and https://www.xilinx.com/support/documentation/application_notes/xapp1311-hot-swapping-fpgas.pdf for understanding reason behind this request. Make sure IIN specifications does not get violated. 

How many boards you observing this issue? 

How many boards you have tested?

Regards,
Bhushan

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ramu_seva
Observer
Observer
611 Views
Registered: ‎07-16-2019

Thank You Bhushan for the response.

For now we just tested one board. We don't want to Power Up another board without understanding the cause behind it.

We specifically make sure that none of the IO's have voltage before the VCCO. We are not doing any hot swapping either.

One thing which we did was to go ahead and program the Virtex with bit file containing some logic in it and we saw the VCCO voltage increase to 2.1 V. The logic in the bit file was DDR3 MIG core and Ethernet PCS core IP's and AXI IP.

Thanks,

 Ramu  

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ramu_seva
Observer
Observer
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Registered: ‎07-16-2019

Hi Bhushan,

One thing which we found was that the FLASH which we were using for Virtex 7 has an IO voltage of 3.3 V. And the default state of the flash IO's was pulled high. After noticing that we removed the flash from the board.

Next we tried to power on each voltage domain independently and we noticed that when we power Up only the VCCINT, all the other voltages VCCAUX, VCCAUXIO, VCCO were 0 V but when we power Up both VCCINT (1V)and VCCAUX , VCCAUX_IO (1.8 V) we see that the the VCCO voltage we read is 1.65 V.

The regulator supplying the 1.8 V VCCO is turned off during this.

We want to understand what lead to this problem. Is it the flash IO's?

 

When we soldered the correct flash onto the board, we were able to program the Virtex successfully from it. 

 

How is the VCCAUX/VCCAUX_IO voltage influence the VCCO voltage. Can you please help us with it. 

 

Thansk,

 

 Ramu

As I mentioned in the above response during this time the VCCO voltage increases to 2.1 V. I mean once the bit file is successfully loaded from flash.

 

 

sivakumarreddy50
Observer
Observer
528 Views
Registered: ‎07-13-2018

Check the pin type and pin voltage in the IO pin planning once 

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ramu_seva
Observer
Observer
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Registered: ‎07-16-2019

We have checked that and we have the correct voltages assigned to pins. But one thing to note here is that we are observing the 1.6 V on the VCCO supply after we power ON the board without loading the bitstream.

 

Once we load the bitstream, the voltage increases to 2.1 V.

 

Thanks,

 Ramu

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bpatil
Xilinx Employee
Xilinx Employee
331 Views
Registered: ‎03-07-2018

Hi @ramu_seva 

I missed to check this thread, apologize for late reply. You can use @ to notify update to particular forum user in ongoing forum thread. Beware do not use it when you start new thread. 

Can you please share flash details (Part no.) and interface schematic (which includes FPGA and Flash interface).

Does loading other design bitstream also shows same behavior? Please try programming simple design to FPGA. 

Regards,
Bhushan

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ramu_seva
Observer
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Registered: ‎07-16-2019

Hi Bpatil,

 

Thanks for your reply. We encountered a problem on our board. We connected the VCC_BAT voltage to VCCO domain. We were powering up VCCAUX 1.8 V first and then VCCO 1.8 V domain next.

To correct this we ganged both VCC_AUX and VCCO voltages together and power them up at the same time.

We solved the issue of VCCO reaching 2.1 V after programming or 1.6 V before programming and our board is working fine now.

But we are still not sure what is the reason behind this. Can you please provide us some insight into it. How are the two power domains connected inside the Virtex Chip.

Have you noticed this kind of issues before. 

 

Thanks,

 

 Ramu

 

 

 

 

 

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bpatil
Xilinx Employee
Xilinx Employee
306 Views
Registered: ‎03-07-2018

Hi @ramu_seva 

Its difficult to comment without checking schematic of your board before and after correction. 

Please check note 11 " VCCBATT is required only when using bitstream encryption. If battery is not used, connect VCCBATT to either ground or VCCAUX" of 'Table 2: Recommended Operating Conditions' in ds183_Virtex_7_Data_Sheet 

ug470_7Series_Config Page 32 also mentions same guidelines for VCCBATT connection. 

 

 

Regards,
Bhushan

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