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zhangming
Visitor
Visitor
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Registered: ‎10-20-2018

Virtex-4 FPGA

Hello, I need to ask you about Virtex-4 FPGA, when the Virtex-4 FPGA 3.3V voltage input side of a larger voltage burr (exceeding the allowable voltage range in the data sheet), what impact on the FPGA IO sampling? Or will it affect the value of the internal registers? Thanks a million!
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alesea
Explorer
Explorer
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Registered: ‎05-08-2018

zm,

 

If the transient is is at or below the recommended  maximum, nothing happens.

 

If the transient is at or below the absolute maximum value, operation may not be valid (data errors).

 

If the transient is in excess of the absolute maximum value, permanent damage may result, and the device may no longer work.

 

There is no minimum time exceeding the abs max:  exceeding means probable damage and failure of the device.