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Visitor
Visitor
3,761 Views
Registered: ‎10-27-2013

Vivado 2015.2 Timing Closure vs 2014.4

I have upgraded a Virtex 7 design from Vivado 2014.4 to 2015.2 and I am now not able to get timing closure.

 

When I look at the failed paths I've noticed fanouts much larger than I expect as I have the synthesis -fanout_limit option set to 400. I'm seeing fanouts over 1000 in the routed design.

 

Have other people had worse routability with 2014.4 vs 2015.2?

 

Why are some of the  fanouts so high?

 

 

 

 

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Xilinx Employee
Xilinx Employee
3,713 Views
Registered: ‎10-24-2013

Re: Vivado 2015.2 Timing Closure vs 2014.4

Hi @tziersch
fanout_limit specifies the number of loads a signal must drive before it startsreplicating logic. This global limit is a general guide, and when the tool determines it is necessary, it can ignore the option.

If a hard limit is required, you will need to use MAX_FANOUT

Please set this MAX_FANOUT attribute to 400 in your design and check the timing.

For usage refer to page 49 of http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_2/ug901-vivado-synthesis.pdf

Thanks,Vijay
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