06-08-2020 01:02 PM
I'm using the internal XADC in Artix 7. The XADC is in single pass mode with continuous sampling. In simulation, I write to Config Reg 1 to initiate the single pass sequence and normally this works fine. However, if this write operation occurs while XADC Busy is low (due to continuous sampling), the single pass sequence does not occur and the continuous default mode accesses continue as if the write never happened. Is this the real operation of the XADC, or is it just a simulation issue? Thanks.
06-11-2020 11:40 AM
it could be simulation related. It should go into the default mode again after the pass.
maybe set the sequence to be something like the VAUX channels then try it. it may not be noticeable when it is doing a single pass on internal supplies and temperature.
06-11-2020 11:48 AM
Thank you. The single-pass sequence is actually sampling VAUX inputs as you said, and I can see that the single-pass does not occur (in sim) when this is initiated while busy is low. The continuous default mode just continues on as if nothing happened. Based on your input I can assume that this is just a simulation anomaly, correct?