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Registered: ‎08-21-2019

XC9572XL CPLD checksum

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Hi All,

I am working with an XC9572XL CPLD and require a checksum to confirm that the correct version of the "software" has been programmed.

I can read back the device checksum once programmed but this is not unique for any changes in the design e.g. I can remove an invertor and still get the same checksum. 

Is there an alternative solution that gives a more unique checksum? 

Regards,

Graham

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Teacher
Teacher
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Registered: ‎07-09-2009

This is getting interesting

 

The JESD spec,

http://www.pldtool.com/pdf/jesd3c_jedecfmt.pdf

its so old its a photo copy of a scan, and not even lined up streight,

 

pgae 12 , say its possible in "some PLD" to put a user string.

Sorry, I dont knwo how / if its possible in ISE, its got to be 30 years since I used such CPLD as these.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

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Teacher
Teacher
522 Views
Registered: ‎07-09-2009

easy answer is nope.

 

Most / All FPGAs have a user register that can be set by a user to a number,

     but as far as I remember, these smaller CPLDs dont.

BTW: I'd think taht adding / removing a inverter would change the CPLD checksum,

    Again as far as I rember its a running polynomial, so very unlikely to be the same if you change something.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Registered: ‎08-21-2019

Thanks drjohnsmith,

The device does have a user register section so I could put a unique value in there. 

 

Strange, changing an input from active low to active high (by removing an inverter) changed some of the contents of the .jed file but the checksum (starting with C) on the second to last line of the file did not change. 

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Registered: ‎08-21-2019

I created an MVP to demonstrate the scenario I am experiencing. 

I have my top module containing just this:

module mvp(
    input IN_1,
    input IN_2,
    output OUT
    );
	 
	assign OUT = (IN_1 & IN_2);

endmodule

when i implement this design the technology schematic shows a single AND gate and the .jed file ends with:

C0882*
9372

I then changed the module to this (! infront of IN_1):

module mvp(
    input IN_1,
    input IN_2,
    output OUT
    );
	 
	assign OUT = (!IN_1 & IN_2);

endmodule

when I implement this design, the technology schematic shows the inverter added to IN_1 input but the .jed file still ends with: 

C0882*
9372

despite lines 1298 and 1304 of the two files being different.

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Teacher
Teacher
481 Views
Registered: ‎07-09-2009

Well,

 

i have learnt something new today,

thank you

when I get to a machine which can , I'll give you Kudos for that.

As for your quesiotn then, sorry your stummped.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
0 Kudos
Highlighted
Teacher
Teacher
480 Views
Registered: ‎07-09-2009

This is getting interesting

 

The JESD spec,

http://www.pldtool.com/pdf/jesd3c_jedecfmt.pdf

its so old its a photo copy of a scan, and not even lined up streight,

 

pgae 12 , say its possible in "some PLD" to put a user string.

Sorry, I dont knwo how / if its possible in ISE, its got to be 30 years since I used such CPLD as these.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post

Highlighted
Teacher
Teacher
469 Views
Registered: ‎07-09-2009

So,

found an old machine that has ISE on it,

if you right click on generate program file, and go into process properties, cehck at bottom you have advanced,

   you have the option -n user code..  I'm guessing HeX values.

but I cant seem to see this in the JED file produced.

( God I wish I had a machine this fast back in the 90's, when I was doing a lot of CPLD work ! )

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Registered: ‎08-21-2019
thanks, I am currently storing the Version of the "software" there.

I wanted to be able to click Get Device Checksum in iMPACT and verify that it matches the Checksum on our drawings, to confirm that the device has been programmed correctly but that would not work if two different .jed files can have the same checksum.
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Registered: ‎08-21-2019

Section 6.4 of the JEDEC standard says that the fuse checksum is a 16 bit sum of all 8 bit words. 

thanks for the Help drjohnsmith, much appreciated.

 

Graham