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vilas@s
Observer
Observer
792 Views
Registered: ‎07-27-2017

XCZU47DR-2FFVE1156 Pin out files

Hello, 

I was not able to find the the package pin out files for the part number "XCZU47DR-2FFVE1156". 

It is RFSOC device with 3rd generation, ultrascale plus .

Kindly help me out, how to get the package file for the same above mentioned part number. 

https://www.xilinx.com/support/package-pinout-files/zynq-ultrascale-plus-pkgs.html

In the above mentioned link the package files are present for the 1st generation devices, kindly advice can i consider the same for the 3rd generation device also. 

 

Thanks,

Vilas Kumar S

 

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2 Replies
pthakare
Moderator
Moderator
773 Views
Registered: ‎08-08-2017

Hi vilas@s 

Here is the early access lounge for Gen3 devices documentation .

https://www.xilinx.com/member/zu_rfsoc_gen2_3_tools_ea.html#documents

There is XCZU4xDR Package CSV Pinout Files section in the above lounge

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vilas@s
Observer
Observer
696 Views
Registered: ‎07-27-2017

Hi,

Thanks for your response.

In our design we have connected JTAG lines to bank 503 which is PSCONFIG I/O type. But in the IBIS model couldn't able find the appropriate model selector configurations banks.

Since, i need to perform SI simulations for JTAG lines kindly provide your suggestion what alternate buffer model can be selected.

 

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