Zynq-7 SDIO length matching

[diverger]

In UG933, it says:

I'm a little confused. I'm using the MIO SDIO interface to connect to SD card.

1. It first says should place 40~60 Ohms series resistor to CLK line. Then, it says place 0 Ohm resistor in series to SDIx_CLK, where is SDIx_CLK? Is it just the SDIO_CLK?
2. It says should control the delay between DATA(CMD) and SD_CLK within 50~200ps. Can I make them equal length? Then ideally, the delay will be 0, but the 0 delay is apparently outside of 50~200. 

[johnvivm]

1 - Yes, SDx_CLK is SDIO_CLK, they just drop the 'IO' and added the x for the case you have more than one. Confusing, I agree.

It says 'place a 0 Ohm resistor that you can later change it for another value as your simulations and tests go on'. 

2 - Delay is one thing, delay skew another:

Delay skew is the variation in delays between a number of signals. Keep in mind physical length is not the same as electrical length, that is what you should equalize. I would also be surprised of stating a minimum. I would assume it means there is no point in struggling for a skew less than 50 ps.