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Visitor
Visitor
1,438 Views
Registered: ‎12-06-2015

Zynq-700 LVDS camera interface question

Hello, 

 

I need to interface a camera IC interface from TI that outputs LVDS signal, the device is

sn65lvds315, here is a block diagram

 

sn65lvds315.png

 

Can somehow comment in general the steps I might need to do, I understand I need to deserialize the LVDS data as first step.

I have read that there is a way to capture the frame flags  but that might only apply to ADC data which is 14 or 16 bit, since this is a stream, I might need to transfer everything using DMA to DDR memory, but maybe is possible I can place some logic to compare the SOF and EOF values that the transceiver output and generate an interrupt to inform the processor. ?

 

Will appreciate if someone can point me in the right direction.

 

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Moderator
Moderator
1,413 Views
Registered: ‎04-18-2011

Re: Zynq-700 LVDS camera interface question

Did you take a look at xapp585 this shows 7:1 deserialisation? It will show you how we do per bit deskew and frame alignment?
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Mentor
Mentor
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Registered: ‎06-16-2013

Re: Zynq-700 LVDS camera interface question

Hi @mhanuel

 

As @klumsde already mentioned before, I suggest to refer xapp585 and xapp1315.

You can understand how to resolve your request.

 

xapp585 (for 7 series and zynq 7 series)

https://www.xilinx.com/support/documentation/application_notes/xapp585-lvds-source-synch-serdes-clock-multiplication.pdf

xapp1315 (ultra scale and ultra scale +)

https://www.xilinx.com/support/documentation/application_notes/xapp1315-lvds-source-synch-serdes-clock-multiplication.pdf

 

Also, if you want to transfer the stream video data to DRAM, I suggest to use the following IPs.

 

- Video-in to AXI4Stream

- Video Timing Generator

- VDMA

- AXI4Stream to Video-out (if necessary)

 

If you have another question, would you post new thread on "Video" section ?

 

Best regards,